Cyrus AV5, Service Manual, Page: 24 / 34

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Title: Digital Audio Decoder
Approved by:
Drawn by:
File Name:
Path: M:\IanS\temp\temp.ddb - Documents\SC01BLK1.SCH
Print date:
Drawn date:
Issue:
Sheet of
2-Apr-2008
B
Huntingdon, United Kingdom.
This drawing is the intellectual property of Centralforce Ltd.
O
c
Description:
1 1
Error : MISSLOGO.WMF file not found.
VDD1
1
VSS1
2
XMT958
3
WR
, D
S
, EMWR
4
R
D
, R
/W , EMO
E
5
A1
,S
C
D
IN
6
A
0
,S
CCL
K
7
DAT
A7
8
DAT
A6
9
DAT
A5
10
DAT
A4
11
VDD2
12
VSS2
13
DAT
A3
14
DAT
A2
15
DAT
A1
16
DAT
A0
17
CS
18
SC
DI
O,
SC
DOUT
19
AB
OOT
,
I
N
T
R
E
Q
20
EX
TMEM
21
SDATAN1
22
VDD3
23
VSS3
24
SCLKN1,STCCLK2
25
LRCLKN1
26
SDATAN2,CMPDAT,RCV958
27
SCLKN2,CMPCLK
28
LRCLKN2,CMPREQ
29
CLKIN
30
CLKSEL
31
F
ILTD
32
F
ILTS
33
VDDA
34
VSSA
35
RE
S
E
T
36
DBDA
37
DBCLK
38
AUDATA2
39
AUDATA1
40
AUDATA0
41
LRCLK
42
SCLK
43
MCLK
44
PLL
Clock Manager
Compressed Data
Input Interface
S/PDIF Receiver
Digital Audio
Input Interface
Parallel or Serial Host Interface
Output
Formatter
Framer
Shifter
Input
Buffer
Controller
Input
Buffer
RAM
Output
Buffer
RAM
Memory
RAM
Program
Memory
RAM
Data
Memory
RAM
Program
Memory
RAM
Data
24-bit
DSP Processing
STC
PRELIMINARY DATA
DO NOT USE IN ANGER
CS4923, CS4925 or CS4926
DAT
AUX/R
X
4
1
HOL
D/R
U
B
IT
2
S
C
L
/CCL
K
3
SDA/C
DOUT
4
ADI
/C
DI
N
5
AD0
/C
S
6
SPI
/I
2
S
7
PDN
8
AIN3R/AUDIO
9
AIN3L/AUTODATA
10
AIN2L/FREQ0
11
AIN2R/FREQ1
12
AIN1R
13
AIN1L
14
AINAUX
15
CMOUT
16
FI
L
T
17
AGND1
18
VA+
19
AGND2
20
AOUT1
21
AOUT2
22
AOUT3
23
AOUT4
24
AOUT5
25
AOUT6
26
DEM
27
XT
I
28
XT
O
29
OVL/ERR
30
C
L
KOUT
31
SDIN3
32
SDIN2
33
SDIN1
34
SDOUT2
35
SDOUT1
36
LRCK
37
SCLK
38
DGND2
39
VD+
40
DGND1
41
RX
1
42
SC
L
KAUX/R
X
2
43
L
R
C
KAUX/R
X
3
44
Voltage
Reference
Input
Mux
S/PDIF RX/Auxiliary PLL
Clock Osc/
Divider
DEM
Serial
Mux
ADC
Right
ADC
Left
ADC
Mono
Input
Analog
Control Port
Control
Volume
#6
DAC
Control
Volume
#5
DAC
Control
Volume
#4
DAC
Control
Volume
#3
DAC
Control
Volume
#2
DAC
Control
Volume
#1
DAC
Digital
Audio
Data
Interface
Filters
Low
Pass
and
Output
Stage
Digital
Filters
Gain
CS4226KQ
5
6
7
Ref Output
1
GND1
2
VCC
3
GND2
4
Case
5
Case
6
TORX176
INPUT 1
Optical IN
INPUT 7
ANALOGUE IN
75R
INPUT 3
COAX IN
IEC958
75R
INPUT 5
COAX IN
IEC958
75R
INPUT 6
COAX IN
IEC958
75R
INPUT 4
COAX IN
IEC958
IEC958
Ref Output
1
GND1
2
VCC
3
GND2
4
Case
5
Case
6
TORX176
INPUT 2
Optical IN
IEC958
A0
12
A1
11
A2
10
A3
9
A4
8
A5
7
A6
6
A7
5
A8
27
A9
26
A1
0
23
A1
1
25
A1
2
4
A1
3
28
A1
4
29
A1
5
3
OE
24
CE
22
O0
13
O1
14
O2
15
O3
17
O4
18
O5
19
O6
20
O7
21
VCC
32
GND
16
A1
6
2
XX/Vp
p
1
A1
7
30
XX/PGM
31
IC?
27C020
256k bytes
for Boot Code
and Look-up table
49.152 MHz
IEC958
Switch
Left
Right
Left Surround
Right Surround
Left Tape
Right Tape
Centre
Sub
IEC958
COAXIAL
OUT
IEC958
12.288 MHz
Gain = 6dB
Motorola MC68HC11A1 micro
ALS input
3
2
1
4
Gain = 80dB
MC-BUS
Block diagram of SC01 showing analogue and digital signal paths
Front panel
28-May-1998
5
6
7
5
6
7
5
6
7
5
6
7
5
6
7
Gain = 6dB
L
o
w p
as
s f
ilter
s
V
o
lu
me
c
ont
rol
O
u
tput
buffe
rs
Mu
te
RAM
INPUT 8
ANALOGUE IN
INPUT 9
ANALOGUE IN