Cypress S6J3200 Series, Manual

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CHAPTER 24:Inter-IC Sound (I2S)
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 909
3.
Operations of the I2S
This section describes the operation of I2S.
3.1.
I2S Frame Construction
I2S supports frame format of multiple channel construction. Frame can be configured to 1 or 2 sub frames.
Number of each frame’s channel and word length can be set individually.
1 Sub Frame Construction
Figure 3-1 1 Sub Frame Construction
Description

When I2Sn_CNTREG:SBFN bit is "0", frame becomes 1 sub frame composite

Number of channels of 1-sub frame is determined by I2Sn_MCR0REG:S0CHN

Up to 32 channels can be set

Each channel bit length (word length) is determined by I2Sn_MCR0REG:S0WDL

Sub frame channel starts from 0th. Each channel is set to valid/invalid with the corresponding bit of
I2Sn_MCR1REG register. Transmission/reception of data is not performed to invalid channel

Dummy bit can be inserted behind sub frame by setting I2Sn_CNTREG:OVHD. 0 to 1023 bits are
insertable

Polarity of WS is set with I2Sn_CNTREG:FSPL

Pulse width of WS can be set to 1 bit or 1 channel length by setting I2Sn_CNTREG:FSLN

Frame sync phase of WS can be set to "0" or "1" clock through I2Sn_CNTREG:FSPH

In this construction, settings of I2Sn_MCR0REG:S1CHN and I2Sn_MCR2REG:S1WDL are ignored