CHAPTER 21:Ethernet MAC
672
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.21.
Hash Top Register (ETHERNETn_hash_top)
Description of Hash Top register is shown.
REGISTER_NAME
ETHERNETn_hash_top
OFFSET
0x084
ACCESS_SIZE
W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET
31
30
29
28
27
26
25
24
BIT_NAME
address[63:56]
ACCESS_TYPE
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0x00
BIT_OFFSET
23
22
21
20
19
18
17
16
BIT_NAME
address[55:48]
ACCESS_TYPE
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0x00
BIT_OFFSET
15
14
13
12
11
10
9
8
BIT_NAME
address[47:40]
ACCESS_TYPE
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0x00
BIT_OFFSET
7
6
5
4
3
2
1
0
BIT_NAME
address[39:32]
ACCESS_TYPE
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0x00
[bit31:0] address: Hash address [63:32]
The upper 32 bits of the hash address register.
Summary of Contents for S6J3200 Series
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