CHAPTER 21:Ethernet MAC
630
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.4.
DMA Configuration Register (ETHERNETn_dma_config)
Description of DMA Configuration register is shown.
REGISTER_NAME
ETHERNETn_dma_config
OFFSET
0x010
ACCESS_SIZE
W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET
31
30
29
28
27
26
25
24
BIT_NAME
Reserved
dma_addr_
bus_width
tx_bd_exten
ded_mode_
en
rx_bd_exte
nded_mode
_en
Reserved
force_max_
amba_burst
_tx
force_max_
amba_burst
_rx
force_discar
d_on_err
ACCESS_TYPE
R0,WX
R/W
R/W
R/W
R0,WX
R/W
R/W0
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
23
22
21
20
19
18
17
16
BIT_NAME
rx_buf_size[7:0]
ACCESS_TYPE
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0xF0
BIT_OFFSET
15
14
13
12
11
10
9
8
BIT_NAME
Reserved
tx_pbuf_tcp
_en
tx_pbuf_siz
e
rx_pbuf_size[1:0]
ACCESS_TYPE
R0,WX
R/W
R/W
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0x0
0
1
0x3
BIT_OFFSET
7
6
5
4
3
2
1
0
BIT_NAME
Reserved
Reserved
amba_burst_length[4:0]
ACCESS_TYPE
R0,W0
R0,WX
R/W
PROT_TYPE
Wp
INITIAL_VALUE
0
0
0x04
[bit31] Reserved
Always read "0". Writing has no effect.
[bit30] dma_addr_bus_width: DMA address bus width
Bit
Description
0
32-bit DMA address bus width.
1
Setting not allowed.
Summary of Contents for S6J3200 Series
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