Cypress S6J3200 Series, Manual

Page: 302 / 1355

CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 301
5.4.
Pulse Counter Control Registers (ADC12Bn_PCCTRL0 to 63)
These registers hold the reload and current values of positive and negative counters of the pulse
detection function for the corresponding logical channel. The positive counters count down the positive
events of the range comparator and negative counters count down the negative events of the range
comparator. ADC12Bn_PCCTRL0 (described here) is dedicated to channel 0, ADC12Bn_PCCTRL63 is
dedicated to channel 63. Other registers (ADC12Bn_PCCTRL1,.....ADC12Bn_PCCTRL62) have similar
bit fields.
REGISTER_NAME ADC12Bn_PCCTRLi (i = 0 to 63)
OFFSET i*4
ACCESS_SIZE B H W
MULTIPLE 0:63
NUMERIC_TYPE
-
OTHER
-
Pulse Counter Control Register (ADC12Bn_PCCTRL0)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME Reserved PCTNCT[4] PCTNCT[3] PCTNCT[2] PCTNCT[1] PCTNCT[0]
ACCESS_TYPE RX,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 000 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME Reserved PCTNRL[4] PCTNRL[3] PCTNRL[2] PCTNRL[1] PCTNRL[0]
ACCESS_TYPE R0,W0 R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 000 0 0 0 1 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME PCTPCT[7] PCTPCT[6] PCTPCT[5] PCTPCT[4] PCTPCT[3] PCTPCT[2] PCTPCT[1] PCTPCT[0]
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME PCTPRL[7] PCTPRL[6] PCTPRL[5] PCTPRL[4] PCTPRL[3] PCTPRL[2] PCTPRL[1] PCTPRL[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 1 0
[bit31:29] Reserved : Reserved bits
Reading this bit returns an undefined.
Writing data to these bits has no effect on the operation.