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ImageCraft Assembly Language Guide, Document # 001-44475 Rev. *B
M8C Instruction Set
4.37
Bitwise XOR
XOR
Computes the logical XOR for each bit position using both arguments. The result of the logical XOR
is placed in the corresponding bit position for the argument.
The Carry Flag is only changed when the
XOR F, expr
instruction is used. The CF will be set to
the result of the logical XOR of the CF at the beginning of instruction execution and the second argu-
ment’s value at bit position 2 (i.e., F[2] and expr[2]).
For the
XOR F, expr
instruction, the Zero Flag is handled the same as the Carry Flag in that it is
changed as a result of the logical XOR of the Zero Flag’s value at the beginning of instruction execu-
tion, and the value of the second argument’s value at bit position 1 (i.e., F[1] and expr[1]). However,
for all other
XOR
instructions, the Zero Flag will be set or cleared based on the result of the logical
XOR operation. If the result of the
XOR
instruction is that all bits are zero, the Zero Flag will be set;
otherwise, the Zero Flag is cleared. The Carry Flag is not affected.
Note that XOR (or AND or OR, as appropriate) is a read-modify write instruction. When operating on
a register, that register must be of the read/write type. Bitwise XOR to a write only register will gener-
ate nonsense.
Instructions
Operation
Opcode
Cycles Bytes
Mnemonic
Argument
XOR
A, expr
0x31
4
2
XOR
A, [expr]
0x32
6
2
XOR
A, [X+expr]
0x33
7
2
XOR
[expr], A
0x34
7
2
XOR
[X+expr], A
0x35
8
2
XOR
[expr], expr
0x36
9
3
XOR
[X+expr], expr
0x37
10
3
XOR
REG[expr], expr
0x45
9
3
XOR
REG[X+expr],
expr
0x46
10
3
XOR
F, expr
0x72
4
2
Conditional
Flags:
CF
ZF
Unaffected (unless
F
is destination).
Set if the result is zero; cleared otherwise (unless
F
is destination).
Example 1:
mov
A, 0x00
xor
A, 0xAA
;A=0xAA, CF=unchanged, ZF=0
Example 2:
and
F, 0x00
;F=0
xor
F, 0x01
;F=1 therefore CF=0, ZF=0
Example 3:
mov
A, 0x5A
xor
A, 0xAA
;A=0xF0, CF=unchanged, ZF=0
A
A
k
A
A
ram k
A
A
ram X k
+
ram k
ram k
A
ram X k
+
ram X k
+
A
ram k
1
ram k
1
k
2
ram X k
1
+
ram X k
1
+
k
2
reg k
1
reg k
1
k
2
reg X k
1
+
reg X k
1
+
k
2
F
F
k
Summary of Contents for PSoC DESIGNER ImageCraft M8C
Page 6: ...6 ImageCraft Assembly Language Guide Document 001 44475 Rev B Contents Feedback ...
Page 10: ...10 ImageCraft Assembly Language Guide Document 001 44475 Rev B Introduction Feedback ...
Page 24: ...24 ImageCraft Assembly Language Guide Document 001 44475 Rev B M8C Microprocessor Feedback ...
Page 95: ...ImageCraft Assembly Language Guide Document 001 44475 Rev B 95 Assembler Directives Feedback ...
Page 96: ...96 ImageCraft Assembly Language Guide Document 001 44475 Rev B Assembler Directives Feedback ...
Page 104: ...104 ImageCraft Assembly Language Guide Document 001 44475 Rev B Feedback ...
Page 108: ...108 ImageCraft Assembly Language Guide Document 001 44475 Rev B Index Feedback ...
