Cypress PSoC CY8CTMG20 Series, Technical Reference Manual

Page: 91 / 308

PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C 91
TrueTouch Module
Figure 11-13. TrueTouch Counter Block Diagram
The programmable timer is a 6-bit down counter with a ter-
minal count output. This timer has one data register associ-
ated with it. The timer is started when the TrueTouch block is
enabled. The enable signal is double synchronized to the
timer’s clock domain. When started, the timer always starts
counting down from the value loaded into its data registers
(CS_TIMER). This timer only has a one shot mode, in which
the timer completes one full count cycle and stops. Disabling
and reenabling the TrueTouch block restarts the timer.
Figure 11-14. RLO Timer Block Diagram
The timer’s clock is either the 32 kHz clock (RLO) or the
TrueTouch count clock, depending upon the value of the
PXD_EN bit in the CS_CR2 register. See the
CS_CR2 Reg-
ister on page 93 for details.
11.1.3.1 Operation
When started, the timer loads the value contained in its data
register and counts down to its terminal count of zero. The
timer outputs an active high terminal count pulse for one
clock cycle when it reaches the terminal count. The low time
of the terminal count pulse is equal to the loaded decimal
count value multiplied by the clock period. (TC
pw
= COUNT
VALUE
decimal
* CLK
period
). The period of the terminal count
output is the pulse width of the terminal count plus one clock
period (TC
period
= TC
pw
+ CLK
period
). Refer to the timing dia-
gram in Figure 11-19 on page 98 .
8-Bit
Up Counter
Low Byte Counter High Byte Counter
0
1
2
3
0
1
CSCLK
RLO
CLKSEL[1:0]
RLOCLOCK
CHAIN
CO
8-Bit
Up Counter
COL
0
1
2
3
CSOUT[1:0]
INSEL[2:0]
IMO
INM INS
R
S
COLM COLS
R
S COL
COLR
I N
COHM COHS
R
S COH
COHR
PPM PPS
R
S
PF DONE
(Control Logic)
CS_INT
To Pin
COH
COUNT_EN
CO
IMO
IMO/2
IMO/4
IMO/8
CS_INT
IN
COLR
COHR
Reset
Yes
Mode=00 or 11
COUNT_EN=0
PF_DONE=0
Mode=01 or 10
Yes
COUNT_EN=1
Block
Enabled
?
Falling
Edge? Rising
Edge?
Inter-
rupt
Mode=00
Mode=11 Mode=01
Mode=10
No Yes No No
Yes
Yes
COUNT_EN=0
PF_DONE=1
Rising
Edge?
No
Block
Enable
d?
No
CLK
CLK/RLO
IMO
COUNT_EN
No
Yes
COUNT_EN=0
INV
0
1
2
3
4
5
6
7
Edge Detect
CMP0
ILO
CMP1
RLO_TIMER_TC
TIMER
RLO_TIMER_IRQ
MUXBUS
‘0’
6-Bit Counter
RLO_TIMER_TC
RLO_TIMER_IRQ
CO
IOW or
BLOCK_EN
IOW or
BLOCK_EN
IOW or
BLOCK_EN
IOW or
BLOCK_EN
0
1 CSCLK
PXD_EN
RLO
Register
Relaxation
Oscillator
Programmable
Timer
DATA[5:0]
Terminal
Count
IRQ
TrueTouch
Clock
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