PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
297
Glossary
phase
The relationship between two signals, usually the same frequency, that determines the delay
between them. This delay between signals is either measured by time or angle (degrees).
Phase-Locked Loop
(PLL)
An electronic circuit that controls an
oscillator
so that it maintains a constant phase angle rela-
tive to a reference signal.
pin
A terminal on a hardware component. Also called lead.
pinouts
The pin number assignment: the relation between the logical inputs and outputs of the PSoC
device and their physical counterparts in the printed circuit board (PCB) package. Pinouts
involves pin numbers as a link between schematic and PCB design (both being computer gener-
ated files) and may also involve pin names.
port
A group of pins, usually eight.
positive edge
A transition from a logic 0 to a logic 1. Also known as a rising edge.
posted interrupts
An interrupt that has been detected by the hardware but may or may not be enabled by its mask
bit. Posted interrupts that are not masked become pending interrupts.
Power On Reset (POR)
A circuit that forces the PSoC device to reset when the voltage is below a pre-set level. This is
one type of
hardware reset
.
program counter
The instruction pointer (also called the program counter) is a register in a computer processor
that indicates where in memory the CPU is executing instructions. Depending on the details of
the particular machine, it holds either the address of the instruction being executed or the
address of the next instruction to be executed.
protocol
A set of rules. Particularly the rules that govern networked communications.
PSoC®
Cypress Semiconductor’s Programmable System-on-Chip (PSoC) mixed-signal array. PSoC®
is a trademark of Cypress.
PSoC blocks
See
analog blocks
and
digital blocks
.
PSoC Designer™
The software for Cypress’ Programmable System-on-Chip technology.
pulse
A rapid change in some characteristic of a signal (for example, phase or frequency) from a base-
line value to a higher or lower value, followed by a rapid return to the baseline value.
pulse width modulator
(PWM)
An output in the form of duty cycle which varies as a function of the applied measure.
R
RAM
An acronym for random access memory. A data-storage device from which data can be read out
and new data can be written in.
register
A storage device with a specific capacity, such as a bit or byte.
reset
A means of bringing a system back to a known state. See
hardware reset
and
software reset
.
resistance
The resistance to the flow of electric current measured in ohms for a conductor.
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...