6
Document # 001-20559 Rev. *D
General Purpose IO (GPIO)
6.1.2
Global IO
The GPIO ports are also used to interconnect signals to and
from the digital PSoC blocks, as global inputs or outputs.
The global IO feature of each GPIO (port pin) is off by
default. To access the feature, two parameters must be
changed. To configure a GPIO as a global input, the port
global select bit must be set for the desired GPIO using the
PRTxGS register. This sets BYP = 1 in
and dis-
connects the output of the PRTxDR register from the pin.
Also, the Drive mode for the GPIO must be set to the digital
High Z state. (Refer to the
“PRTxDMx Registers” on page 10
for more information.) To configure a GPIO as a global out-
put, the port global select bit must again be set. But in this
case, the drive state must be set to any of the non-High Z
states.
6.1.3
Analog Input
Analog signals can pass into the PSoC device core from
PSoC device pins through the block’s AOUT pin. This pro-
vides a resistive
(~300 ohms) directly through the
GPIO block. For analog modes, the GPIO block is typically
configured into a high
analog drive mode (High
Z). The mode turns off the Schmitt trigger on the input path,
which may reduce power consumption and decrease inter-
nal switching noise when using a particular IO as an analog
input. Refer to the Electrical Specifications chapter in the
device data sheet.
Figure 6-1. GPIO Block Diagram
DM[2:0]=110b
R
D
EN
Q
RESET
I2C Input
Global
Input Bus
QinLatch
5.6K
Vdd
Write PRTxDR
2:1
Drive
Logic
DM2
DM1
DM0
DATA
2:1
BYP
Global
Output Bus
I2C Output
I2C Enable
Slew
Control
Vdd
5.6K
PIN
(To Readmux,
Interrupt Logic)
Output Path
Input Path
DM1
DM0
BYP
CELLRD
AIN
Data Bus
Read PRTxDR
INBUF
Vdd
0.
2.
3.
4.
5.
6.
7.
Drive Modes
DM1
DM2
Drive Mode
0 0 0 Resistive Pull Down0ResistiveStrong
DM0
0 0 1 Strong Drive1StrongStrong
0 1 0 High Impedance 2 High Z High Z
0 1 1 Resistive Pull Up 3 StrongResistive
1 0 0 Open Drain, Drives High 4 High ZStrong (Slow)
1 0 1 Slow Strong Drive 5Strong (Slow)Strong (Slow)
1 1 0 High Impedance Analog6High ZHigh Z
1 1 1 Open Drain, Drives Low7Strong (Slow)High Z
Diagram
Number
Data = 0
Data = 1
AOUT
1.
Summary of Contents for PSoC CY8C23533
Page 4: ...Contents Overview 4 Document 001 20559 Rev D Section G Glossary 385 Index 401 ...
Page 16: ...Contents Overview 16 Document 001 20559 Rev D ...
Page 24: ...24 Document 001 20559 Rev D Section A Overview ...
Page 30: ...30 Document 001 20559 Rev D Pin Information ...
Page 54: ...54 Document 001 20559 Rev D Supervisory ROM SROM ...
Page 60: ...60 Document 001 20559 Rev D RAM Paging ...
Page 68: ...68 Document 001 20559 Rev D Interrupt Controller ...
Page 76: ...12 Document 001 20559 Rev D General Purpose IO GPIO ...
Page 82: ...18 Document 001 20559 Rev D Internal Main Oscillator IMO ...
Page 84: ...20 Document 001 20559 Rev D Internal Low Speed Oscillator ILO ...
Page 90: ...26 Document 001 20559 Rev D External Crystal Oscillator ECO ...
Page 94: ...30 Document 001 20559 Rev D Phase Locked Loop PLL ...
Page 106: ...42 Document 001 20559 Rev D Sleep and Watchdog ...
Page 228: ...164 Document 001 20559 Rev D Section D Digital System ...
Page 234: ...170 Document 001 20559 Rev D Array Digital Interconnect ADI ...
Page 278: ...214 Document 001 20559 Rev D Digital Blocks ...
Page 296: ...232 Document 001 20559 Rev D Analog Interface ...
Page 304: ...240 Document 001 20559 Rev D Analog Array ...
Page 308: ...244 Document 001 20559 Rev D Analog Input Configuration ...
Page 312: ...248 Document 001 20559 Rev D Analog Reference ...
Page 338: ...274 Document 001 20559 Rev D Section F System Resources ...
Page 354: ...290 Document 001 20559 Rev D Multiply Accumulate MAC ...
Page 374: ...310 Document 001 20559 Rev D I2C ...
Page 400: ...336 Document 001 20559 Rev D Section G Glossary ...