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CYBLE-022001-00

Document Number: 001-95662 Rev. *J

Page 13 of 40

Electrical Specification

Table 7

 details the absolute maximum electrical characteristics for the Cypress BLE module.

Table 7.  CYBLE-022001-00 Absolute Maximum Ratings

Table 8

 details the RF characteristics for the Cypress BLE module.

Table 8.  CYBLE-022001-00 RF Performance Characteristics

Table 9

 throug

Table 48

 list the module-level electrical characteristics for the CYBLE-022001-00. All specifications are valid for 

–40 °C 

 TA 

 85 °C and TJ 

 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V, except where noted.

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

V

DDD_ABS

Analog, digital, or radio supply relative to V

SS

 

(V

SSD

 = V

SSA

)

–0.5

6

V

Absolute maximum

V

CCD_ABS

Direct digital core voltage input relative to V

SSD

–0.5

1.95

V

Absolute maximum

V

DDD_RIPPLE

Maximum power supply ripple for V

DD

 and V

DDR

 

input voltage

100

mV

3.0-V supply

Ripple frequency of 100 kHz 

to 750 kHz

V

GPIO_ABS

GPIO voltage

–0.5

V

DD 

+0.5

V

Absolute maximum

I

GPIO_ABS

Maximum current per GPIO

–25

25

mA

Absolute maximum

I

GPIO_injection

GPIO injection current: Maximum for V

IH

 > V

DD

 

and minimum for V

IL

 < V

SS

–0.5

0.5

mA

Absolute maximum current 

injected per pin

LU

Pin current for latch up

–200

200

mA

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

RF

O

 

RF output power on ANT

–18

0

3

dBm Configurable via register 

settings

RX

S

RF receive sensitivity on ANT

–87

dBm

Guaranteed by design 

simulation

F

R

Module frequency range

2400

2480

MHz

G

P

Peak gain

0.5

dBi

G

Avg

Average gain

–0.5

dBi

RL

Return loss

–10.5

dB

Table 9.  CYBLE-022001-00 DC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

V

DD1

Power supply input voltage 

1.8

5.5

V

With regulator enabled

V

DD2

Power supply input voltage unregulated 

1.71

1.8

1.89

V

Internally unregulated 

supply

V

DDR1

Radio supply voltage (radio on)

1.9

5.5

V

V

DDR2

Radio supply voltage (radio off)

1.71

5.5

V

Active Mode, V

DD

 = 1.71 V to 5.5 V

I

DD3

Execute from flash; CPU at 3 MHz

1.7

mA T = 25 °C, 

V

DD

 = 3.3 V

I

DD4

Execute from flash; CPU at 3 MHz

mA T = –40 °C to 85 °C

I

DD5

Execute from flash; CPU at 6 MHz

2.5

mA T = 25 °C, 

V

DD

 = 3.3 V

I

DD6

Execute from flash; CPU at 6 MHz

mA T = –40 °C to 85 °C

I

DD7

Execute from flash; CPU at 12 MHz

4

mA T = 25 °C, 

V

DD

 = 3.3 V

Summary of Contents for EZ-BLE PRoC CYBLE-022001-00

Page 1: ...CRM Cyp 2001 Bluetooth SIG 4 1 qualified QDID 67366 Declaration ID D026297 Power Consumption TX output power 18 dbm to 3 dbm Received signal strength indicator RSSI with 1 dB resolution TX current co...

Page 2: ...at enables concurrent hardware and firmware editing compiling and debugging of PSoC 3 PSoC 4 PSoC 5LP PSoC 4 BLE PRoC BLE and EZ BLE module systems with no code size limitations PSoC peripherals are d...

Page 3: ...19 Serial Communication 21 Memory 22 System Resources 22 Environmental Specifications 28 Environmental Compliance 28 RF Certification 28 Safety Certification 28 Environmental Conditions 28 ESD and EM...

Page 4: ...rea are maintained Designs should be held within the physical dimensions shown in the mechanical drawings in Figure 1 All dimensions are in millimeters mm Table 1 Module Design Dimensions See Figure 1...

Page 5: ...ing Bottom View Seen from Bottom Side View Top View See from Top Note 1 No metal should be located beneath or above the antenna area Only bare PCB material should be located beneath the antenna area F...

Page 6: ...corner This placement minimizes the additional recommended keep out area stated in item 2 Refer to AN96841 for module placement best practices 2 To maximize RF performance the area immediately around...

Page 7: ...nless otherwise noted Pad length of 0 91 mm 0 455 mm from center of the pad on either side shown in Figure 6 is the minimum recommended host pad length The host PCB layout pattern can be completed usi...

Page 8: ...sion from Orign mils 1 0 26 1 64 10 24 64 57 2 0 26 2 41 10 24 94 88 3 0 26 3 17 10 24 124 80 4 0 26 3 93 10 24 154 72 5 0 26 4 69 10 24 184 65 6 0 81 9 74 31 89 383 46 7 1 57 9 74 61 81 383 46 8 2 34...

Page 9: ...B1_SDA TCPWM Sensor 17 P3 7 SCB1_CTS TCPWM Sensor 18 P1 4 SCB0_RX SCB0_MOSI SCB0_SDA TCPWM Sensor 19 P1 5 SCB0_TX SCB0_MISO SCB0_SCL TCPWM Sensor 20 P3 6 SCB1_RTS TCPWM Sensor 21 P4 0 6 SCB1_RTS SCB1_...

Page 10: ...t VDD and VDDR to the same supply 2 Independent supply Power VDD and VDDR separately External Component Recommendation In either connection scenario it is recommended to place an external ferrite bead...

Page 11: ...CYBLE 022001 00 Document Number 001 95662 Rev J Page 11 of 40 The CYBLE 022001 00 schematic is shown in Figure 9 Figure 9 CYBLE 022001 00 Schematic Diagram...

Page 12: ...press module performance improves many of these characteristics For more information see Table 8 Table 6 Chip Antenna Specifications Component Reference Designator Description Silicon U1 68 pin WLCSP...

Page 13: ...BS Maximum current per GPIO 25 25 mA Absolute maximum IGPIO_injection GPIO injection current Maximum for VIH VDD and minimum for VIL VSS 0 5 0 5 mA Absolute maximum current injected per pin LU Pin cur...

Page 14: ...1 71 V to 1 89 V Regulator Bypassed IDD19 WDT with WCO on A T 25 C IDD20 WDT with WCO on A T 40 C to 85 C Hibernate Mode VDD 1 8 V to 3 6 V IDD27 GPIO and reset active 150 nA T 25 C VDD 3 3 V IDD28 GP...

Page 15: ...V 2 0 V VIL Input voltage LOW threshold 0 3 VDD V CMOS input LVTTL input VDD 2 7 V 0 3 VDD V LVTTL input VDD 2 7 V 0 8 V VOH Output voltage HIGH level VDD 0 6 V IOH 4 mA at 3 3 V VDD Output voltage H...

Page 16: ...25 pF load 60 40 duty cycle FGPIOIN GPIO input operating frequency 1 71 V VDD 5 5 V 48 MHz 90 10 VIO Table 13 OVT GPIO DC Specifications P5_0 and P5_1 Only Parameter Description Min Typ Max Units Det...

Page 17: ...on Min Typ Max Units Details Conditions A_RES Resolution 12 bits A_CHNIS_S Number of channels single ended 6 6 full speed 9 A CHNKS_D Number of channels differential 3 Diff inputs use neighboring I O...

Page 18: ..._dnl Differential nonlinearity VDD 1 71 V to 5 5 V 1 Msps 1 2 2 LSB VREF 1 V to VDD A_DNL Differential nonlinearity VDD 1 71 V to 3 6 V 1 Msps 1 2 LSB VREF 1 71 V to VDD A_DNL Differential nonlinearit...

Page 19: ...IDEXT Enable pulse width external 2 TCLK ns TTIMRESWINT Reset pulse width internal 2 TCLK ns TTIMRESEXT Reset pulse width external 2 TCLK ns Table 22 Counter DC Specifications Parameter Description Mi...

Page 20: ...PWMKILLEXT Kill pulse width external 2 TCLK ns TPWMEINT Enable pulse width internal 2 TCLK ns TPWMENEXT Enable pulse width external 2 TCLK ns TPWMRESWINT Reset pulse width internal 2 TCLK ns TPWMRESWE...

Page 21: ...ion Min Typ Max Units Details Conditions ISPI1 Block current consumption at 1 Mbps 360 A ISPI2 Block current consumption at 4 Mbps 560 A ISPI3 Block current consumption at 8 Mbps 600 A Table 33 Fixed...

Page 22: ...10 K P E cycles 10 years Table 38 POR DC Specifications Parameter Description Min Typ Max Units Details Conditions VRISEIPOR Rising trip voltage 0 80 1 45 V VFALLIPOR Falling trip voltage 0 75 1 40 V...

Page 23: ...001b 2 54 2 60 2 67 V VLVI11 LVI_A D_SEL 3 0 1010b 2 63 2 70 2 77 V VLVI12 LVI_A D_SEL 3 0 1011b 2 73 2 80 2 87 V VLVI13 LVI_A D_SEL 3 0 1100b 2 83 2 90 2 97 V VLVI14 LVI_A D_SEL 3 0 1101b 2 93 3 00 3...

Page 24: ...0 3 1 05 A Table 48 ILO AC Specifications Parameter Description Min Typ Max Units Details Conditions TSTARTILO1 ILO startup time 2 ms FILOTRIM1 32 kHz trimmed frequency 15 32 50 kHz Parameter Descrip...

Page 25: ...2399 MHz 35 27 dBm RF PHY Specification RCV LE CA 04 C OBB3 Out of band blocking Wanted signal at 67 dBm and Interferer at F 2484 2997 MHz 35 27 dBm RF PHY Specification RCV LE CA 04 C OBB4 Out of ba...

Page 26: ...ations IRX Receive current in normal mode 18 7 mA IRX_RF Radio receive current in normal mode 16 4 mA Measured at VDDR IRX HIGHGAIN Receive current in high gain mode 21 5 mA ITX 3dBm TX current at 3 d...

Page 27: ...kbps IDLE2TX BLE IDLE to BLE TX transition time 120 140 s IDLE2RX BLE IDLE to BLE RX transition time 75 120 s RSSI Specifications RSSI ACC RSSI accuracy 5 dB RSSI RES RSSI resolution 1 dB RSSI PER RS...

Page 28: ...le Table 51 Environmental Conditions for CYBLE 022001 00 ESD and EMI Protection Exposed components require special attention to ESD and electromagnetic interference EMI A grounded conductive layer ins...

Page 29: ...tlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help LABELING REQUIREMENTS The Original Equipment Manufacturer OEM...

Page 30: ...ns 1 this device may not cause interference and 2 this device must accept any interference including interference that may cause undesired operation of the device Le pr sent appareil est conforme aux...

Page 31: ...at integrate CYBLE 022001 00 do not need additional MIC Japan certification for the end product End product can display the certification label of the embedded module KC Korea CYBLE 022001 00 is certi...

Page 32: ...rientation of the CYBLE 022001 00 in the tape as well as the direction for unreeling Figure 11 Component Orientation in Tape and Unreeling Direction Table 52 Solder Reflow Peak Temperature Module Part...

Page 33: ...dimensions used for the CYBLE 022001 00 Figure 12 Reel Dimensions The CYBLE 022001 00 is designed to be used with pick and place equipment in an SMT manufacturing environment The center of mass for t...

Page 34: ...LE products contact your local Cypress sales representative To locate the nearest Cypress office visit our website Table 54 Ordering Information Part Number CPU Speed MHz Flash Size KB CapSense SCB TC...

Page 35: ...integrated design environment KC Korea Certification MIC Ministry of Internal Affairs and Communications Japan PCB printed circuit board RX receive QDID qualification design ID SMT surface mount tech...

Page 36: ...fied respectively in all instances across the document Updated Overview Updated Module Description Changed GPIO number from 12 to 16 Added QDID and Declaration ID under Bluetooth SIG 4 1 qualified ite...

Page 37: ...o provide the location to the center of each solder pad from the origin in mm and mils Added Figure 6 to provide the location to the center of each solder pad from the origin in mm and mils Updated El...

Page 38: ...Specification Updated System Resources Updated Internal Low Speed Oscillator Updated Table 49 Updated details in Value column corresponding to ECOTRIM parameter Updated Environmental Specifications Ad...

Page 39: ...of 40 J 6002363 DSO 12 22 2017 Update reel dimensions in Figure 10 and Figure 12 Document History Page continued Document Title CYBLE 022001 00 EZ BLE PRoC Module Document Number 001 95662 Revision E...

Page 40: ...ny liability arising out of the application or use of any product or circuit described in this document Any information provided in this document including any sample design information or programming...

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