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CY8CPROTO-064B0S3 PSoC 64 "Secure Boot" Prototyping Kit Guide, Doc. # 002-29505 Rev. *B

39

Hardware

5.2.5.2

Functionality of J7 and J5 Headers (KitProg3 to PSoC 64 Device)

The KitProg3 and target sections of the board each contain a 2 × 5-pin header. These headers
provide a physical connection between the two devices. This connection contains the following
signals:
1. SWD interface required to program/debug the target PSoC 64 device, power, ground, and reset
2. UART interface to the PSoC 64 device
3. I2C interface to the PSoC 64 device

Figure 5-7. J7 and J5 Headers

When the boards are separated, the KitProg3 board can be used to program other target devices
supported by KitProg3 via J7. Headers J5 and J7 can be used to reconnect the KitProg3 and
PSoC 64 sections of the kit.

Table 5-2. Pin Details of J7 Header

KitProg3 Header (J7)

Pin

Signal

Description

Pin

Signal

Description

J7_1

VTARG

Power

J7_2

KP_VBUS

Power

J7_3

GND

Ground

J7_4

P12[0]

I2C_SCL

J7_5

P12[4]

Reset

J7_6

P12[1]

I2C_SDA

J7_7

P12[3]

SWD_CLK

J7_8

P12[7]

UART_RX

J7_9

P12[2]

SWD_IO

J7_10

P12[6]

UART_TX

Table 5-3. Pin Details of J5 Header

PSoC 64 Header (J5)

Pin

Signal

Description

Pin

Signal

Description

J5_1

VTARG

Power

J5_2

VTARG

Power

J5_3

GND

Ground

J5_4

P6[4]

I2C_SCL

J5_5

XRES_L

Reset

J5_6

P6[5]

I2C_SDA

J5_7

P6[7]

SWD_CLK

J5_8

P5[1]

UART_TX

J5_9

P6[6]

SWD_IO

J5_10

P5[0]

UART_RX

PSoC 64 section

PSoC 64 SWD/JTAG
programming headers
(J7,J5)

GND

GND

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Summary of Contents for CY8CPROTO-064B0S3

Page 1: ...ers as part of the Infineon product portfolio Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document Future revisions will occur when appropriate and any changes will be set out on the document history page Continuity of ordering part numbers Infineon continues to support existing pa...

Page 2: ...CY8CPROTO 064B0S3 PSoC 64 Secure Boot Prototyping Kit Guide Doc 002 29505 Rev B Cypress Semiconductor 198 Champion Court San Jose CA 95134 1709 www cypress com ...

Page 3: ...ll and hereby do release Cypress from any claim damage or other liability arising from any Security Breach In addition the products described in these materials may contain design defects or errors known as errata which may cause the product to deviate from published specifications To the extent permitted by applicable law Cypress reserves the right to make changes to this document without further...

Page 4: ...tion 15 3 2 KitProg3 19 3 2 1 Programming and Debugging 19 3 2 2 USB UART Bridge 19 3 2 3 USB I2C Bridge 20 4 Running Code on PSoC 64 Secure Boot MCUs 21 4 1 Provisioning Overview 21 4 2 Create ModusToolbox example application 23 4 3 Provision the Device 25 4 4 Build and Program the Example Application 29 4 5 Additional Code Examples 31 5 Hardware 32 5 1 Schematics 32 5 2 Hardware Functional Descr...

Page 5: ...SoC 64 Secure Boot Prototyping Kit Guide Doc 002 29505 Rev B 4 Contents 5 2 9 System Crystals 42 5 2 10 10 pin SWD JTAG Programming Header 42 5 3 Bill of Materials 42 5 4 Frequently Asked Questions 43 Revision History 44 ...

Page 6: ...scharge ESD sensitive devices Electrostatic charges readily accumulate on the human body and any equipment which can cause a discharge without detection Permanent damage may occur on devices subjected to high energy discharges Proper ESD precautions are recommended to avoid performance degradation or loss of functionality Store unused PSoC 64 Secure Boot Prototyping Boards in the protective shippi...

Page 7: ...S25HL512T a micro B connector for USB device interface two user LEDs and one user push button The board supports operating voltages of 1 8 V 2 5 V and 3 3 V You can use ModusToolbox software to develop and debug your PSoC 64 projects ModusToolbox software is a set of tools that enable you to integrate Cypress devices into your existing development methodology If you are new to PSoC 6 MCU and Modus...

Page 8: ...stand how to create your own PSoC 64 applications The Hardware chapter on page 32 provides a detailed hardware description methods to use the onboard NOR Flash kit schematics and the bill of materials BOM 1 3 Code Examples Code examples for ModusToolbox software can be found at https github com cypresssemiconduc torco Code Examples for ModusToolbox Software 1 4 Board Details The PSoC 64 Secure Boo...

Page 9: ...e 1 1 Prototyping Board Pinout PSoC 64 section KitProg3 KitProg3 USB connector J8 PSoC 64 SWD JTAG programming headers J7 J5 GND VIN P7_0 P7_1 P7_2 P7_3 P0_2 P0_3 P6_3 GND P10_0 P10_1 P10_2 P10_3 P10_4 P10_5 P8_0 P8_1 VREF GND VDDUSB GND P6_VDD P2_0 P2_1 P2_2 P2_3 P2_4 P2_5 P2_6 GND P9_0 P9_1 P9_2 P9_3 P5_6 P5_7 P0_5 P0_4 VCC_FLASH GND VBACKUP PSoC 64 I O J2 PSoC 64 I O J1 ...

Page 10: ... 4 J1 15 GPIO P2 5 J1 14 GPIO P2 6 J1 13 GPIO P2 7 Red User LED LED3 GPIO Connected in active LOW configuration P3 1 Green User LED LED4 GPIO Connected in active LOW configuration P5 0 UART RX GPIO Remove R33 to disconnect from KitProg3 UART TX P5 1 UART TX GPIO Remove R34 to disconnect from KitProg3 UART RX P5 6 J1 7 GPIO P5 7 J1 6 GPIO P6 3 J2 13 GPIO P6 4 J5 4 I2C_SCL TDO_SWO Remove R31 to disc...

Page 11: ... can also use the following support resources if you need quick assistance Self help Technical Documents Local Sales Office Locations P8 0 J2 5 GPIO P8 1 J2 4 GPIO P10 0 J2 11 GPIO P10 1 J2 10 GPIO P10 2 J2 9 GPIO P10 3 J2 8 GPIO P10 4 J2 7 GPIO P10 5 J2 6 GPIO P11 0 QSPI Flash Reset P11 1 QSPI Flash Int P11 2 QSPI Flash CS P11 3 QSPI Flash DATA3 P11 4 QSPI Flash DATA2 P11 5 QSPI Flash DATA1 P11 6...

Page 12: ...ick the File icon and then click Open Times New Roman Displays an equation 2 2 4 Text in gray boxes Describes cautions or unique functionality of the product Table 1 3 Acronyms Used in this Document Acronym Definition ADC Analog to Digital Converter AES Advanced Encryption Standard BOM Bill of Materials CPU Central Processing Unit CRC Cyclic Redundancy Check DAP Debug Access Port DC Direct Current...

Page 13: ... on Chip PWM Pulse Width Modulation QSPI Quad Serial Peripheral Interface RoT Root of Trust RTOS Real Time Operating System SAR Successive Approximation Register SDK Software Development Kit SHA Secure Hash Algorithm SMIF Serial Memory Interface SPI Serial Peripheral Interface SRAM Serial Random Access Memory SWD Serial Wire Debug UART Universal Asynchronous Receiver Transmitter USB Universal Seri...

Page 14: ...rrently running 2 2 Install Software Follow these steps to install the software 1 Install the latest version of ModusToolbox software which should be version 2 3 1 or later The installation of ModusToolbox 2 3 1 software or later on a Windows PC provides all the tools required to build program and provision devices Windows users may skip the rest of this chapter 2 Install Python 3 7 or later on yo...

Page 15: ...pip by default point to python3 run python version Python 3 7 4 pip version pip 19 0 3 from Library Frameworks Python framework Versions 3 7 lib python3 7 site packages pip python 3 7 4 Install the Secure Boot SDK package by running the following from a terminal command prompt pip install U cysecuretools During installation there may be error messages when installing colorama protobuf and json sch...

Page 16: ...ate Mode Backup Domain System DeepSleep Mode System LP ULP Mode CPUs Active Sleep Color Key Power Modes and Domains CPU Subsystem SCB Programmable Analog SAR ADC 12 bit SARMUX Temperature Sensor DSI I O Subsystem Up to 53 GPIOs 68 QFN Package Boundary Scan 2x Smart I O Ports USB PHY System Interconnect Multi Layer AHB IPC MPU SMPU Cortex M4F CPU 150 50 MHz 1 1 0 9 V SWJ ETM ITM CTI Cortex M0 CPU 1...

Page 17: ...t Guide Doc 002 29505 Rev B 16 Kit Operation Figure 3 2 Block Diagram of Prototyping Board Refer to KitProg3 on page 19 and Hardware Functional Description on page 32 for more details on these sections 0 1 2 1 2 345 6 71 3 3 71 89 2 45 8 3 3 45 3 3 3 2 2 ...

Page 18: ...ween various modes of operation of KitProg3 For more details see the KitProg3 User Guide 6 KitProg3 interface headers J7 J5 These headers bring out the SWD USB UART and USB I2C interface of the KitProg3 This is used to program and debug the PSoC 64 device If the KitProg3 section is broken away it can be used to program any supported Cypress device over the 5 pin SWD interface Note that VTARG is an...

Page 19: ...g an isolated root of trust with true attestation and provisioning services 12 PSoC 64 program and debug header J9 This 10 pin header allows you to program and debug the PSoC 64 chip using an external programmer such as MiniProg4 Note that this is not loaded by default 13 PSoC 64 USB device connector J4 The USB cable provided with the Prototyping Kit can also be connected between this USB connecto...

Page 20: ...The kit enumerates as a composite device if you are connecting it to your PC for the first time KitProg3 can operate either in CMSIS DAP Bulk mode or DAPLink mode default ModusToolbox requires CMSIS DAP Bulk mode to program or debug the device while the provisioning process requires DAPLink mode The status LED Amber is always ON in CMSIS DAP Bulk mode and ramping ON OFF at a 2 Hz rate in DAPLink m...

Page 21: ...aster The I2C lines on the PSoC 64 chip are hard wired on the board to the I2C lines of the KitProg3 with onboard pull up resistors as Figure 3 5 shows The USB I2C supports speeds of 50 kHz 100 kHz 400 kHz and 1 MHz For more details on the Kit Prog3 USB I2C functionality see the KitProg3 User Guide Figure 3 5 I2C Connection between KitProg3 and PSoC 64 Chip R18 4 7K R19 4 7K P12 1 P12 0 USB KitPro...

Page 22: ... environment that has a Hardware Security Module HSM For a more detailed overview of what provisioning entails see Chapter 2 of the Secure Boot SDK user guide In the context of evaluating this kit the provisioning flow can be visualized as follows Figure 4 1 Provisioning Flow Generate keys Define policies Form Provisioning Packet Provision the chip Generate image signing key pair Image key pair Im...

Page 23: ...cryption process is a post build script provided by the Secure Boot SDK The build and encrypt signing flow for a CY8CPROTO 064B0S3 target using ModusToolbox software make process is shown below Figure 4 2 Build and Encrypt Signing Flow Standard ModusToolbox Build flow Output hex files Adds MCUBoot Headers trailers pad based on policy Image private key path Encryption key path Encrypt policy_file E...

Page 24: ... overview of the provisioning process has been provided the steps to create an application provision the device and then build program run the application will be shown in detail 1 Open the Eclipse IDE for ModusToolbox and create a new application Figure 4 3 Create New Application 2 Select the CY8CPROTO 064B0S3 target and click Next Figure 4 4 CY8CPROTO 064B0S3 Target Selection ...

Page 25: ...oot Prototyping Kit Guide Doc 002 29505 Rev B 24 Running Code on PSoC 64 Secure Boot MCUs 3 Select the Secure Blinky LED FreeRTOS example and click Create to create the application Figure 4 5 Secure Blinky LED FreeRTOS Example Selection ...

Page 26: ...leaving the CM4 DAP Debug Access Port open to reprogram the chip Based on the selected target this step sets up all the necessary files in your workspace that are used for subsequent steps The target option for CySecureTools functions can either be the family name cyb06xx5 or the kit name cy8cproto 064b0s3 Run the following command cysecuretools target cyb06xx5 init After running this step the pro...

Page 27: ...cy_single_CM0_CM4 json create keys After running this step the keys directory will have public private key pairs and symmetric key pairs if encrypt is enabled generated according to the policy These keys are used either to sign or encrypt images built by ModusToolbox software Figure 4 7 Application Workspace having a new keys directory 4 Connect your CY8CPROTO 064B0S3 PSoC 64 Secure Boot Prototypi...

Page 28: ...e that does the following things Verify that the Device is in the correct lifecycle stage Verify that Boot Code has not been modified tampered Verify that User flash is empty and no code is running before any provisioning takes place Failing the entrance exam returns an error in the command line If there is any firmware running on the device existing firmware can be erased using the tools like Cyp...

Page 29: ...M0_CM4 json entrance exam Note In case you have a kit which has already been provisioned in the past with different credentials you can re provision the chip with new keys policies by running the below command Re provisioning is possible if the policy provisioned into the chip allows this by default all policies provided in CySecureTools allow re provisioning Note that the Entrance Exam is not run...

Page 30: ...ild is complete you will see in the ModusToolbox console that CySecureTools has signed the image with the keys you generated in the previous section Note that this message is before the memory consumption table in the build console window Figure 4 9 ModusToolbox Console after Build is Complete Note When using the CY8CPROTO_064B0S3 target the ModusToolbox BSP has a post build image signing command ...

Page 31: ...is mode even after a power cycle until the mode button is pressed again To program the kit with the example application click on the Secure_Blinky_LED_FreeRTOS Program KitProg3_MiniProg4 in the Quick Panel The status of the programming sequence will be displayed in the Console window Figure 4 10 Secure_Blinky_LED_FreeRTOS Program KitProg3_MiniProg4 Launch 4 Observe LED3 Red blinking every second O...

Page 32: ... examples on the existing kit you can follow the same steps outlined in Section 4 2 to 4 4 with the alternate project imported into your workspace There are two alternative flows for this 1 If you want to re use existing keys and policies provisioned into the kit please copy the keys and policy folder from your existing project workspace into your new project workspace In this flow you will re use...

Page 33: ...nality The line provides an isolated RoT with true attestation and provisioning services In addition these MCUs deliver a pre configured secure execution environment which supports system software of various IoT platforms and provides secure provisioning key storage and firmware management For more information see the PSoC 64 web page and the datasheet Figure 5 1 Schematics of PSoC 64 Signals 36R ...

Page 34: ...igital peripheral functions in a single chip For more information visit the PSoC 5LP web page Also see the CY8C58LPxx Family datasheet Figure 5 2 Schematics of PSoC 5LP based KitProg3 and PSoC 5LP Power 36R 3 EDVHG LW3URJ 36R 3 3RZHU 6 5 SDVV DSDFLWRU HO 6LJ SDVV DSDFLWRU 6 2 6 3 3B9 3 3B9 3 3B9 3 3B9 3 3B9 3 3B9 3 3B9 3B9 86 3 3B9 5 6 7 B6 B6 8 57B7 8 57B5 5 73 8 7 3 3 3 3 3 3 3 3 3 3 3 3 3 3 966...

Page 35: ...rog3 section and on J5 on the PSoC 64 section Figure 5 3 Schematics of Programming and Serial Interface Connections Note R18 and R19 are located on the KitProg3 section of the board and are loaded by default If the PSoC 64 device section is separated there is a provision to load R26 and R40 located on that section to use as I2C pullups 97 5 5 RKP 5 RKP 5 1R RDG 5 1R RDG B6 B6 3 B 3 B 3XOO XSV 97 5...

Page 36: ...ltages are routed through an ORing circuit to allow powering the PSoC 64 chip from either USB port One linear regulator is used to achieve either 1 8 V 2 5 V or 3 3 V to power the PSoC 64 chip and peripherals Figure 5 4 shows the schematics of the voltage regulator and power selection circuits The voltage selection is made through jumper J3 Figure 5 4 Schematics of Power Supply System 5HYHUVH 9ROW...

Page 37: ...DD pins J1 20 or when powered through PSoC 64 USB J4 After measuring the current consumption populate resistor R21 or place a shorting jumper across the two jumper pins for normal operation of the kit Note If KitProg3 is connected to a PC and VTARG is not connected to P6 VDD either by removal of R21 or header J6 is left open PSoC 64 chip will be back powered through the KitProg3 to PSoC 64 interfa...

Page 38: ...eaders have 0 1 inch spacing and include a subset of the GPIOs available on the PSoC 64 device Figure 5 6 J1 and J2 Headers PSoC 64 section KitProg3 KitProg3 USB connector J8 PSoC 64 SWD JTAG programming headers J7 J5 GND VIN P7_0 P7_1 P7_2 P7_3 P0_2 P0_3 P6_3 GND P10_0 P10_1 P10_2 P10_3 P10_4 P10_5 P8_0 P8_1 VREF GND VDDUSB GND P6_VDD P2_0 P2_1 P2_2 P2_3 P2_4 P2_5 P2_6 GND P9_0 P9_1 P9_2 P9_3 P5_...

Page 39: ...4 P0 4 GPIO User SW2 J2_05 P8 0 GPIO J1_05 P0 5 GPIO J2_06 P10 5 GPIO J1_06 P5 7 GPIO J2_07 P10 4 GPIO J1_07 P5 6 GPIO J2_08 P10 3 GPIO J1_08 P9 3 GPIO J2_09 P10 2 GPIO J1_09 P9 2 GPIO J2_10 P10 1 GPIO J1_10 P9 1 GPIO J2_11 P10 0 GPIO J1_11 P9 0 GPIO J2_12 GND Ground J1_12 GND Ground J2_13 P6 3 GPIO J1_13 P2 6 GPIO J2_14 P0 3 GPIO J1_14 P2 5 GPIO J2_15 P0 2 GPIO J1_15 P2 4 GPIO J2_16 P7 3 GPIO J1_...

Page 40: ...3 board can be used to program other target devices supported by KitProg3 via J7 Headers J5 and J7 can be used to reconnect the KitProg3 and PSoC 64 sections of the kit Table 5 2 Pin Details of J7 Header KitProg3 Header J7 Pin Signal Description Pin Signal Description J7_1 VTARG Power J7_2 KP_VBUS Power J7_3 GND Ground J7_4 P12 0 I2C_SCL J7_5 P12 4 Reset J7_6 P12 1 I2C_SDA J7_7 P12 3 SWD_CLK J7_8 ...

Page 41: ...The policies that enable the SMIF interface are provided in the templates Figure 5 8 Schematics of Quad SPI Flash 5 2 7 LEDs LED2 Amber indicates the status of KitProg3 See the KitProg3 User Guide for details LED1 indicates the status of power supplied to KitProg3 The board has two user controllable LEDs LED3 LED4 connected to the PSoC 64 pins P2 7 P3 1 for user applications Figure 5 9 Schematics ...

Page 42: ...et button SW1 is connected to the XRES pin of the PSoC 64 device and is used to reset the device The mode select button SW3 is connected to the PSoC 5LP device for programming mode Refer to the KitProg3 User Guide for details All the buttons connect to ground on activation active LOW Figure 5 10 Schematics of Push Buttons When the Reset button SW1 is pressed the XRES line of the PSoC 64 chip is pu...

Page 43: ...provide a wide range of options with either the ECO or IMO Figure 5 12 Schematics of Crystal Oscillator 5 2 10 10 pin SWD JTAG Programming Header The board has a provision for the 10 pin header J9 which allows you to program and debug the PSoC 64 device using an external programmer such as MiniProg4 This is not loaded by default Figure 5 13 Schematics of 10 pin SWD JTAG Header 5 3 Bill of Material...

Page 44: ... V Powering the PSoC 64 chip to more than 4 V will damage it You cannot drive the I O system with 3 6 V supply voltages 4 I am unable to program the target device a Check if R21 is present or J6 to ensure that the jumper shunt is present on the board b Verify that the KitProg3 is in the CMSIS DAP Bulk mode indicated by the status LED2 on steady not blinking If it is blinking press the mode button ...

Page 45: ...pdated description Updated Provision the Device on page 25 Updated description Removed figure Command Prompt Updated Build and Program the Example Application on page 29 Updated Figure 4 9 B 7062683 04 23 2021 Updated Document Title to read as CY8CPROTO 064B0S3 PSoC 64 Secure Boot Prototyping Kit Guide Replaced Secure Boot with Secure Boot in all instances across the document Replaced PSoC 64 Secu...

Page 46: ...ge on page 20 Updated description Updated Figure 3 5 Updated Running Code on PSoC 64 Secure Boot MCUs chapter on page 21 Updated description Added hyperlinks in required places Updated Provisioning Overview on page 21 Updated description Updated Figure 4 1 Updated Figure 4 2 Updated Create ModusToolbox example application on page 23 Updated description Updated Provision the Device on page 25 Updat...

Page 47: ...on page 36 Replaced MCU with Device in heading Updated description Updated Figure 5 5 Updated Expansion Connectors on page 37 Updated Functionality of the J1 and J2 Headers Target Board on page 37 Updated description Updated Figure 5 6 Updated Table 5 1 Updated Functionality of J7 and J5 Headers KitProg3 to PSoC 64 Device on page 39 Replaced MCU with Device in heading Updated description Updated F...

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