Cypress CY8CPROTO-062S3-4343W, Manual

Page: 30 / 39

CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 30
Hardware
3.2.3 Serial Interconnection between PSoC 5LP and PSoC 6 MCU
In addition of use as an onboard programmer, the PSoC 5LP functions as an interface for the
USB-UART and USB-I2C bridges, as shown in
Figure 3-3 . The USB-Serial pins of the PSoC 5LP
are hard-wired to the I2C/UART pins of the PSoC 6 MCU. These pins are also available on the
breadboard compatible I/O headers.
Note: The USB-UART bridge between KitProg3 and PSoC 6 MCU does not support UART hard-
ware flow control by default. Populate R29 and R33 to enable this functionality.
The 10-pin header J11 allows you to program and debug PSoC 6 MCU using an external program-
mer such as MiniProg4. This header has SWD enabled by default but can optionally support JTAG
by removing R21, R30 and populating R37, R38 instead. Note that this will disconnect PSoC 6 MCU
from KitProg3 USB-I2C bridge.
Figure 3-3. Schematics of Programming and Serial Interface Connections
3.2.3.1 BT UART
The board also has a provision to connect the BT core of CYW4343W to the KitProg3 USB-UART
bridge. To do this, remove R53, R64, R29 and R33 and then load R52, R63, R24 and R26. When
connecting to BT UART directly using an external USB-UART bridge or a KitProg3 that is separated
from the board, please ensure to connect VTARG to the level translator’s input pin of the external
USB-UART bridge and GND to the corresponding ground pin of the external USB-UART bridge. This
is to ensure proper level translation between the external USB-UART bridge and the CYW4343W.
ARD_D0
ARD_D1
ARD_A0
ARD_A1
BT_UART_RXD
BT_UART_TXD
BT_UART_RTS
BT_UART_CTS
R53 0 OHM
KitProg3 MCU UART with H/W Flow Control
R52 0 OHM
No Load
UART_RX
UART_CTS
UART_TX
UART_RTS
R64 0 OHM
UART RTS
UART RX
UART TX
R63 0 OHM
No Load
UART CTS
R29 0 OHM
No Load
R24 0 OHM
No Load
R33 0 OHM
No Load
R26 0 OHM
No Load
TCLK_SWCLK
TMS_SWDIO
XRES_L_MCU
KitProg3 MCU SWD
R35 0 OHM
R43 0 OHM
R49 0 OHM
SWDIO
SWDCLK
RESET
TDO_SWO
R38 0 OHM
No Load
TDI
R37 0 OHM
No Load
MCU_I2C_SDA
MCU_I2C_SCL
MCU_I2C_SDA
MCU_I2C_SCL
R32 4.7K
No Load
I2C_SCL
I2C_SDA
P6_VDD
R27 4.7K
No Load
KitProg3 MCU I2C
R30 0 OHM
R21 0 OHM TCLK_SWCLK
TDI
XRES_L_MCU
TDO_SWO
TMS_SWDIO
C5
1uF
10V
No Load
Note: Maximum voltage on P6_VDD is 3.6V. Supplying 5V
through the 10-pin header will permanently damage the device
J11
50MIL KEY ED SMD
No Load
1
3
5
7
9 2
4
6
8
10
P6_VDD
10-pin SWD/JTAG Header
TVS1
ESD3V3D5-TP
No Load