Cypress CY8CPROTO-062S3-4343W, Manual

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CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 29
Hardware
3.2.2 PSoC 5LP based KitProg3 (U2)
An onboard PSoC 5LP (CY8C5868LTI-LP039) is used as a KitProg3 to program and debug PSoC 6
MCU. The PSoC 5LP connects to the USB port of a PC through a USB connector and to the SWD
and other communication interfaces of PSoC 6 MCU.
For more information, visit the PSoC 5LP webpage . Also, see the CY8C58LPxx Family datasheet .
Figure 3-2. Schematics of PSoC 5LP based KitProg3
P5LP_SIO_VREF
USB_V_SENSE
P5LP1_4
SWDCLK
P5LP1_2
SAR Bypass
Capacitor
Del-Sig Bypass
Capacitor
SWDIO
P5LP2_2
P5LP2_3
P5LP2_4
P5LP2_0
P5LP2_1
TP16
No Load
P5LP_VDD
TP17
No Load
TP18
No Load
UART_RX
UART_TX
P5LP_VDD
VTARG_MEAS
KP_DM
KP_DP
P5LP1_6
P5LP15_5
C12 1.0 uF
No Load
C13 1.0 uF R12 22E
R15 0ohm
C17 1.0 uF
R11 22E
U2
CY 8C5868LTI-LP039
P2[
3]
65
P2[
1]
63
P12[3]
47
P3[7]
37
P3[
5]
34
P3[
3]
32
P3[
1]
30
P15[3]
41
P15[2]
40
P1[
7]
19
P1[5]
16
P1[3]
14
P1[1]
12
VSSD
25
P15[
6]
D
+
22
P15[
7]
D
-
23
VC
C
D
26
P12[0]
38
P1[0]
11
P1[2]
13
P1[4]
15
P1[
6]
18
P3[
0]
29
P3[
2]
31
P3[
4]
33
P12[1]
39
P12[2]
46
P3[6]
36
P2[
0]
62
P2[
2]
64
P2[
4]
66
P2[6]
1
P0[0]
48
P0[2]
50
P0[
4]
53
P0[
6]
55
VD
D
D
59
VSSD
58
P0[
7]
56
P0[
5]
54
P0[3]
51
P0[1]
49
P2[7]
2
P2[
5]
68
P12[4]
3
P12[5]
4
VSSB
5
IND
6
VBOOST
7
VBAT
8
VSSD
9
XRES
10
VDDIO1
17
P12[
6]
20
P12[
7]
21
VD
D
D
24
P15[
0]
27
P15[
1]
28
VD
D
IO2
67
P15[
5]
61
P15[
4]
60
VC
C
D
57
VD
D
IO
52
VSSD
45
VDDA
44
VSSA
43
VCCA
42
VDDIO3
35
EPAD
H
P5LP_VCCD
P5LP_VDD
P5LP_VDD
P5LP_VDD
P5LP_VCCD
P5LP_VDD
KP_VBUS
I2C_SDA
I2C_SCL
RESET
PSoC 5LP based KitProg3
PSoC 5LP Power