BLE Indoor Positioning with PSoC
6 MCU with BLE Connectivity
Document No. 002-17647 Rev.**
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Figure 18. Security Settings
S w i t c h i n g t h e C P U C o r e s U s a g e
This section describes how to switch between different CPU cores usage (Single core / Dual core) in the BLE PDL examples.
The BLE component has the CPU Core parameter that defines the cores usage. It can take the following values:
Single core (Complete Component on CM0+)
– only CM0+ will be used.
Single core (Complete Component on CM4)
– only CM4 will be used.
Dual core (Controller on CM0+, Host and Profiles on CM4)
– CM0+ and CM4 will be used: CM0+ for the Controller and
CM4 for the Host and Profiles.
The BLE example structure allows easy switching between different CPU cores options. Important to remember:
All application host-files must be run on the host core.
The BLE subsystem (BLESS) interrupt must be assigned to the core where the controller runs.
All additional interrupts (SW2, etc.) used in the example must be assigned to the host core.
