Cypress CY8CKIT-046, Manual

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CY8CKIT-046 PSoC® 4 L-Series Pioneer Kit Guide, Doc. #: 002-03344 Rev. *D 69
Appendix
Figure A-11. EZ-BLE Connections
The EZ-BLE PRoC Module includes the following connections to the PSoC 4200L and KitProg:
■
UART connections to PSoC 4200L through zero-ohm resistors R11 and R12. See Figure A-11
and Table A-2 .
■
I2C connections to PSoC 4200L through zero-ohm resistors R4 and R48. See Table A-2 for
details. The EZ-BLE I2C lines can also be connected to the KitProg I2C lines by populating the
zero-ohm resistors R96 and R97 on the main board. The EZ-BLE I2C lines also connect to the
Arduino-designated I2C lines on the shield board.
■
SWD connections to KitProg through the DPDT switch SW3. The SWD connections are shared
between the PSoC 4200L and EZ-BLE devices. By default, SW3 is not populated and the KitProg
SWD connections are hardwired to PSoC 4200L through zero-ohm resistors, R70 and R71.
Table A-2. EZ-BLE Connections
To program the EZ-BLE PRoC Module using KitProg, follow these instructions:
1. Populate the DPDT switch, SW3. Refer to
“Bill of Materials” on page 86 for the part number of
the switch to be used.
2. Populate the EZ-BLE PRoC Module, U4 (footprint on the reverse side of the shield board).
3. Remove the zero-ohm resistors R70 and R71.
4. Move the DPDT switch to
PSoC 4200L position to program PSoC 4200L and to EZ-BLE position
to program the EZ-BLE PRoC Module.
In addition, the EZ-BLE PRoC Module can be independently programmed and debugged through
the 5-pin SWD header (marked 25 in
Figure A-1 on page 58 ). The footprint for populating the CMOD
capacitor (C90, 2.2 nF) required to develop CapSense applications with the EZ-BLE PRoC Module
EZ-BLE Connections
EZ-BLE PSoC 4200L KitProg (PSoC 5LP) Description
BLE_TX, P1.5 P11[0] – GPIO/UART_TX
BLE_RX, P1.4 P11[1] – GPIO/UART_RX
BLE_SDA, P5.0 P12[1] – GPIO/I2C_SDA
BLE_SCL, P5.1 P12[0] – GPIO/I2C_SCL
BLE_SWDIO, P0.6 – SWDIO, P12[2] SWD I/O
BLE_SWDCLK, P0.7 – SWDCLK, P12[3] SWD Clock
No Load
EZ-BLE PRoC Module
BLE_CMOD
NO LOAD
NO LOAD
No Load
Place all TP in 100 mil
spacing above J19 and J20
EZ- BLE and PSoC 4200L Connections
Arrange Prog line to match
with MP3 5 pin header
Reset Switch
SWD line select
BLE_XRES
BLE_SCL
BLE_SDA
BLE_RX
BLE_TX
BLE_VDDR
BLE_VDD
GND
BLE_SWDCLK
P3_3
BLE_SWDIO
P3_2
BLE_SCL
BLE_SDA
BLE_RX
BLE_TX
P12_0
P12_1
P11_1
P11_0
BLE_SWDCLK
BLE_SWDIO
VDD
BLE_VDD
BLE_VDDR
SWDCLK
SWDIO
P12_0
P12_1
P11_1
P11_0
P3_3
P3_2
BLE_XRES
BLE_XRES
TP18
RED
TP19
RED
SW3
DPDT
1
2
3
4
5
6
TP32 RED TP20 RED TP21 RED TP22 RED
R48 ZERO
TP24 RED TP31 RED
R4 ZERO
TP23 RED
SW5
EVQ-PE105K
1 2
L3
330 OHM @ 100MHz
TP25 RED
U8
CYBLE-022001-00
GND1
1
P4.1
2
P5.1
3
P5.0
4
VDDR
5
P1.6
6
P0.7
7
P0.4
8
P0.5
9
GND2
10
P0.6
11
P1.7
12
VDD
13
XRES
14
P3.5
15
P3.4
16
P3.7
17
P1.4
18
P1.5
19
P3.6
20
P4.0
21
R12 ZERO
L4
330 OHM @ 100MHz
TP27 RED
R11 ZERO
TP26 RED
C90
2200 pF
TP28 RED