CY8C28xxx PSoC Programmable System-on-Chip TRM, Document No. 001-52594 Rev. *G
187
RDIxRO1
x,B6h
13.2.56
RDIxRO1
Row Digital Interconnect Row Output Register 1
This register is used to select the global nets that the row outputs drive.
The ‘x’ in the digital register’s name represents the digital row index. Depending on the digital row characteristics of your
PSoC device (see the table titled
“PSoC Device Characteristics” on page 311
), some addresses may not be available. For
additional information, refer to the
“Register Definitions” on page 329
in the Row Digital Interconnect chapter
.
7
GOO7EN
0
Disable Row’s LUT3 output to global output.
1
Enable Row’s LUT3 output to GOO[7].
6
GOO3EN
0
Disable Row’s LUT3 output to global output.
1
Enable Row’s LUT3 output to GOO[3].
5
GOE7EN
0
Disable Row’s LUT3 output to global output.
1
Enable Row’s LUT3 output to GOE[7].
4
GOE3EN
0
Disable Row’s LUT3 output to global output.
1
Enable Row’s LUT3 output to GOE[3].
3
GOO6EN
0
Disable Row’s LUT2 output to global output.
1
Enable Row’s LUT2 output to GOO[6].
2
GOO2EN
0
Disable Row’s LUT2 output to global output.
1
Enable Row’s LUT2 output to GOO[2].
1
GOE6EN
0
Disable Row’s LUT2 output to global output.
1
Enable Row’s LUT2 output to GOE[6].
0
GOE2EN
0
Disable Row’s LUT2 output to global output.
1
Enable Row’s LUT2 output to GOE[2].
Individual Register Names and Addresses:
x,B6h
RDI0RO1 : x,B6h
RDI1RO1 : x,BEh
RDI2RO1 : x,C6h
7
6
5
4
3
2
1
0
Access : POR
RW : 0
RW : 0
RW : 0
RW : 0
RW : 0
RW : 0
RW : 0
RW : 0
Bit Name
GOO7EN
GOO3EN
GOE7EN
GOE3EN
GOO6EN
GOO2EN
GOE6EN
GOE2EN
Bit
Name
Description
Summary of Contents for CY8C28 series
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