CY8C28xxx PSoC Programmable System-on-Chip TRM, Document No. 001-52594 Rev. *G
155
TMP_DRx
x,6Ch
13.2.27
TMP_DRx
Temporary Data Register
This register is used to enhance the performance in multiple SRAM page PSoC devices.
For additional information, refer to the
“Register Definitions” on page 60
in the RAM Paging chapter
.
7:0
Data[7:0]
General purpose register space.
Individual Register Names and Addresses:
x,6Ch
TMP_DR0 : x,6Ch
TMP_DR1 : x,6Dh
TMP_DR2 : x,6Eh
TMP_DR3 : x,6Fh
7
6
5
4
3
2
1
0
Access : POR
RW : 00
Bit Name
Data[7:0]
Bit
Name
Description
Summary of Contents for CY8C28 series
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