CY8C28xxx PSoC Programmable System-on-Chip TRM, Document No. 001-52594 Rev. *G
131
DxCxxDR0
0,20h
13.2.5
DxCxxDR0
Digital Basic/Communication Type C Block Data Register 0
This register is the data register for a digital block.
The use of this register is dependent on which function is selected for its block. This selection is made in the FN[2:0] bits of
the
. (For the Timer, Counter, Dead Band, CRCPRS, PWMDBL, and DSM functions, a read of
the DxCxxDR0 register returns 00h and transfers DxCxxDR0 to DxCxxDR2.)
The naming convention for the digital basic/communication and control registers is as follows. The first ‘x’ in the digital regis-
ter’s name represents either “B” for basic or “C” for communication. For rows of digital PSoC blocks and their registers, the
second ‘x’ set represents <Prefix>mn<Suffix>, where m=row index, n=column index. Therefore, DBC21DR0 is a digital basic
register for a digital PSoC block in row 2 column 1. Depending on the digital row characteristics of your PSoC device (see the
table titled
“PSoC Device Characteristics” on page 311
), some addresses may not be available. For additional information,
refer to the
“Register Definitions” on page 348
in the Digital Blocks chapter.
7:0
Data[7:0]
Data for selected function.
Block Function
Register Function
DCC Only
Timer
Count Value
No
Counter
Count Value
No
Dead Band
Count Value
No
PWMDBL
Count Value
No
CRCPRS
LFSR *
No
SPIM
Shifter
Yes
SPIS
Shifter
Yes
TXUART
Shifter
Yes
RXUART
Shifter
Yes
DSM
Difference
Yes
Linear Feedback Shift Register (LFSR)
Individual Register Names and Addresses:
0,20h
DBC00DR0 : 0,20h
DBC01DR0 : 0,24h
DCC02DR0 : 0,28h
DCC03DR0 : 0,2Ch
DBC10DR0 : 0,30h
DBC11DR0 : 0,34h
DCC12DR0 : 0,38h
DCC13DR0 : 0,3Ch
DBC20DR0 : 0,40h
DBC21DR0 : 0,44h
DCC22DR0 : 0,48h
DCC23DR0 : 0,4Ch
7
6
5
4
3
2
1
0
Access : POR
R : 00
Bit Name
Data[7:0]
Bit
Name
Description
Summary of Contents for CY8C28 series
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