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CY15FRAMKIT-002 

Excelon

TM

 Ultra QSPI F-RAM Development 

Kit User Guide 

 

 

 

 

 

Cypress Semiconductor 

198 Champion Court 

San Jose, CA 95134-1709 

www.cypress.com

 

 

Summary of Contents for CY15FRAMKIT-002

Page 1: ...CY15FRAMKIT 002 ExcelonTM Ultra QSPI F RAM Development Kit User Guide Cypress Semiconductor 198 Champion Court San Jose CA 95134 1709 www cypress com...

Page 2: ...ITNESS FOR A PARTICULAR PURPOSE To the extent permitted by applicable law Cypress reserves the right to make changes to this document without further notice Cypress does not assume any liability arisi...

Page 3: ...Connection 10 3 Kit Operation 11 3 1 Programming the NUCLEO 433LC P evaluation board 11 3 2 Quad SPI Configuration for STM32L433RC 17 4 Firmware Details 20 A Appendix 23 A 1 CY15FRAMKIT 002 Kit Block...

Page 4: ...ver set provided for this kit The Kit Overview chapter on page 14 explains the features of the kit The Kit Operation chapter on page 20 explains how to program and run the kit The Kit Software chapter...

Page 5: ...J8 J9 to select Arduino or Morpho connector signal connectivity to F RAM device J6 header for 3 3 V 5 0 V F RAM device VCC power supply selection J5 header for 1 8 V 3 3 V 5 0 V ST controller VCC powe...

Page 6: ...board The CY15FRAMKIT 002 operates from 1 8 V to 3 6 V Exceeding the maximum voltage limit 3 6 V can damage the board Figure 2 F RAM Device VDD Select Jumper 2 2 2 ST Controller Device Power Supply J...

Page 7: ...evaluation J11 and J12 You can plug the CY15FRAMKIT 002 board onto the ST NUCLEO L433RC P MCU Evaluation Board through these connectors For the schematic refer to the Appendix on page 23 Figure 5 Mor...

Page 8: ...pho connector signal connectivity to F RAM device Figure 7 shows the headers J7 J8 and J9 User can short F RAM device signals to Arduino connector by shorting J7 and J8 or to Morpho connector by short...

Page 9: ...ides 3V3 5V0 1V8 VSS and VCC test points as shown in Figure 9 Test Points These test points are loaded by default Figure 9 Test Points Table 1 Test Points Test Points Description 3V3 Test point for th...

Page 10: ...and MCU Kit Connection The ST MCU Evaluation Board is plugged onto the CY15FRAMKIT 002 through Arduino and Morpho connectors Arduino J1 J2 J3 and J4 and Morpho connectors J11 J12 as shown in Figure 11...

Page 11: ...lopment Environments IDEs including IARTM Keil and other GCC based IDEs for ARMTM architectures Details about this platform can be found here Figure 12 NUCLEO L433RC P Evaluation Board The STM32L433RC...

Page 12: ...se of problem the user can proceed with manual installation of the driver from toolchains install directory 3 Download the STM32 Nucleo firmware from the www st com stm32nucleo webpage 4 Establish the...

Page 13: ...ons for accessing Cypress s QSPI F RAM are also provided in this folder 1 The files qspiFRAM h c provide all the API accesses to the QSPI F RAM device User should include these with appropriate code m...

Page 14: ...priate properties for target must be selected Press ALT F7 or browse to Options for Target in Project menu 7 Update the clock speed to 80 00MHz in Target Xtal MHz 8 On Debug page ST Link Debugger shou...

Page 15: ...lash Programming Algorithm for this device 10 By default there will be no Programming Algorithm on first time selection of this controller 11 Click Add button to open a list of available algorithms 12...

Page 16: ...evaluating the device features on HyperTerminal 15 Press F7 to build the project There should be no errors or warning at this stage 16 Press F8 to program the controller with default test program Open...

Page 17: ...nit ClockMode QSPI_CLOCK_MODE_0 hqspi Init FlashID QSPI_FLASH_ID_1 hqspi Init DualFlash QSPI_DUALFLASH_DISABLE For details on Quad SPI interface of this controller refer to AN4760 from STMicroelectron...

Page 18: ...ontroller is routed to following GPIOs Sr No Quad SPI Interface Pin STM32L433RC Pin 1 QUADSPI_CS PB11 2 QUADSPI_CLK PB10 3 QUADSPI_IO0 PB1 4 QUADSPI_IO1 PB0 5 QUADSPI_IO2 PA7 6 QUADSPI_IO3 PA6 Figure...

Page 19: ...The CY15FRAMKIT 002 board plugs into the Nucleo board Both Arduino and Morpho connectors need to be plugged in The QSPI_Init function also ensures initialization of the controller pins as Quad SPI pi...

Page 20: ...his API is written specifically to implement a Go Home feature in case the controller faces a miss match of operating mode For eg during a sudden power cycle the F RAM device will retain its state but...

Page 21: ...ata uint32_t read_length This API performs read operation Opcode 0x03 to the device This API performs read of length read_length bytes and stores it in array pointed by read_data starting at location...

Page 22: ...the controller is in known operating mode SPI DPI or QPI 28 void FRAM_Get_Register_Latency void This API reads the register latency bits from device and stores the corresponding decimal value in Reg_...

Page 23: ...Block Diagram Morpho Connector Morpho Connector Arduino connector Arduino connector Arduino connector Arduino connector F RAM Device SOIC F RAM Device GQFN Level Shifter Regulator F RAM device power...

Page 24: ...CY15FRAMKIT 002 DVK Doc No 002 23147 Rev 24 A 2 CY15FRAMKIT 002 Kit Components Placement...

Page 25: ...r Signals CY15FRAMKIT 002 Kit Signals J1_1 D8 PB6 I O3_A J1_2 PWM D9 PA8 WP _I O2_A J1_3 PWM CS D10 PA11 CS _A J1_4 PWM MOSI D11 PB15 SI_I O0_A J1_5 MISO D12 PB14 SO_I O1_A J1_6 SCK D13 PB13 SCK_A J1_...

Page 26: ...rs J11 J12 J11 Pin ST Controller Signals CY15FRAMKIT 002 Kit Signals J11_1 PC9 NC J11_2 PC8 NC J11_3 PB8 NC J11_4 PC6 NC J11_5 PB7 NC J11_6 PC5 NC J11_7 AVDD NC J11_8 5V STLINK NC J11_9 GND GND J11_10...

Page 27: ...J12_15 PA13 NC J12_16 3V3 3V3 J12_17 PA14 NC J12_18 5V 5V0 J12_19 GND GND J12_20 GND GND J12_21 NC NC J12_22 GND GND J12_23 PC13 NC J12_24 VIN NC J12_25 PC14 NC J12_26 NC NC J12_27 PC15 NC J12_28 PA0...

Page 28: ...at can be achieved with Nucleo L433RC P board is restricted to 60MHz Resistor Debug Signals Usage R7 WP _I O2 Solder R7 which will connect signals from J8 to F RAM Device U1 U2 directly R8 I O3 Solder...

Page 29: ...CY15FRAMKIT 002 DVK Doc No 002 23147 Rev 29 A 6 Bill of Materials BOM...

Page 30: ...7_1 J8_1 SCK_A J7_2 J8_2 CS _A J7_3 J8_3 SO_I O1_A J7_4 J8_4 WP _I O2_A J7_5 J8_5 I O3_A J7_6 J8_6 SI_I O0_A J7_7 J8_7 CS1 _A J7_8 J8_8 SHDN _A Headers to select Morpho connector signal connectivity t...

Page 31: ...ture RDCR2 3F Prints out CR2 value on terminal Stores the read value in operating_mode structure RDCR4 45 Prints out CR4 value on terminal Stores the read value in operating_mode structure RDCR5 5E Pr...

Page 32: ...te Memory and register latency settings before performing Read operations 222 Changes the operating mode of device to Dual SPI 111 Changes the operating mode of device to Standard SPI 999 Resets the O...

Page 33: ...CY15FRAMKIT 002 DVK Doc No 002 23147 Rev 33 Figure 17 GUI Menu...

Page 34: ...2 23147 Rev 34 Revision History Document Revision History Document Title ExcelonTM Ultra QSPI F RAM Development Kit User Guide Document Number 002 23147 Rev Revision Issue Date Origin of Change Descri...

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