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FS781/82/84

Document #: 38-07029  Rev. *F

Page 8 of 12

Absolute Maximum Ratings

[6]

This device contains circuitry to protect the input against
damage due to high static voltages or electric fields; however,
precautions should be taken to avoid application of any
voltage higher than the absolute maximum rated voltages to

this circuit. For proper operation, V

IN

 and V

OUT

 should be

constrained to the range, V

SS 

< (V

IN

 or V

OUT

) < V

DD

. All digital

inputs are tied high or low internally. Refers to electrical speci-
fications for operating supply range.

Table 5. Absolute Maximum Ratings

Parameter

Description

Min.

Max.

Unit

V

DD

Operating Voltage

3.0

6.0

VDC

VIRvss

Input, relative to V

SS

–0.3

V

DD

 + 0.3

VDC

VORvss

Output, relative to V

SS

–0.3

V

DD

 + 0.3

VDC

TOP

Temperature, Operating

0

+70

 

°

C

TST

Temperature, Storage

–65

+150

°

C

T

J

Temperature, Junction

+125

°

C

Table 6. DC Electrical Characteristics 

V

DD

 = 3.3V and 5.0V ±10%, X

IN

 = 48 MHz, T

A

 = 0°C to 70°C

Parameter

Description

Min.

Typ.

Max.

Unit

V

IL

Input Low Voltage

0.3 * V

DD

VDC

V

IH

Input High Voltage

0.7 * V

DD

VDC

I

IL

Input Low Current

100

µ

A

I

IH

Input High Current

100

µ

A

V

OL

Output Low Voltage I

OL

= 10 mA, V

DD

 = 5V 

0.4

VDC

V

OH

Output High Voltage I

OH

 = 10 mA, V

DD

 = 5V

V

DD

 – 1.0

VDC

V

OL

Output Low Voltage I

OL

= 6 mA, V

DD

 = 3.3V

0.4

VDC

V

OH

Output High Voltage I

OH

 = 5 mA, V

DD

 = 3.3V

2.4

VDC

Rpd

Resistor, Pull-down (Pin 7)

60K

125K

200K

Rpu

Resistor, Pull-up (Pin 3)

60K

125K

200K

C

xin

Input Capacitance (Pin 1) 

8

pF

C

xout

Output Capacitance (Pin 2)

10

pF

I

CC

5V Dynamic Supply Current (C

L = 

No Load)

38

mA

I

CC

3.3V Dynamic Supply Current (C

L = 

No Load)

20

mA

ISC

Short Circuit Current (FSOUT)

25

mA

BW

BW% Variations, 3.30V

[7]

–20

0

+20

%

BW

BW% Variations, 5.00V

[7]

–30

0

+30

%

Table 7. Timing Electrical Characteristics 

V

DD

 = 3.3V and 5.0V ±10%, T

A

 = 0°C to 70°C, C

L

 = 15 pF, X

IN

 = 48 MHz

 

Parameter

Description

Min.

Typ.

Max.

Unit

tTLH

Output Rise Time Measured at 10%–90% @ 5 VDC

1.8

2.2

2.7

ns

tTHL

Output Fall Time Measured at 10%–90% @ 5 VDC

1.5

2.0

2.5

ns

tTLH

Output Rise Time Measured at 0.8V–2.0V @ 5 VDC

0.5

0.65

0.8

ns

tTHL

Output Fall Time Measured at 0.8V–2.0 V @ 5 VDC

0.5

0.65

0.8

ns

tTLH

Output Rise Time Measured at 10%–90% @ 3.3 VDC

2.1

2.65

3.2

ns

tTHL

Output Fall Time Measured at 10%–90% @ 3.3 VDC

1.7

2.1

2.6

ns

tTLH

Output Rise Time Measured at 0.8V–2.0V @ 3.3 VDC

0.7

0.95

1.2

ns

tTHL

Output Fall Time Measured at 0.8V–2.0 V @ 3.3 VDC

0.6

0.85

1.1

ns

TsymF1

Output Duty Cycle

45

50

55

%

Notes: 

6.

Single Power Supply

: The Voltage on any input or /O pin cannot exceed the power pin during power-up.

7. Percentage variations from the bandwidth % values given in 

Table 2

 and 

Table 3

.

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Summary of Contents for FS781

Page 1: ...dulating the reference clock the measured EMI at the fundamental and harmonic frequencies of FSOUT is greatly reduced This reduction in radiated energy can significantly reduce the cost of complying w...

Page 2: ...F I Analog Loop Filter Single ended three state output of the phase detector A two pole passive loop filter is connected to LF 6 SOIC 8 TSSOP FSOUT O CMOS TTL Modulated Clock Frequency Output The cent...

Page 3: ...950 680 400 250 210 190 170 46 1 0 900 580 270 220 190 180 165 48 1 0 790 440 260 210 180 160 140 50 1 0 660 360 250 190 170 150 140 52 1 0 470 325 220 185 155 135 120 54 1 0 470 270 200 170 140 130...

Page 4: ...ote 4 990 710 520 420 360 300 36 1 0 Note 4 970 670 480 380 310 230 38 1 0 Note 4 880 560 380 310 270 220 40 1 0 Note 4 800 460 290 240 230 220 42 1 0 1030 680 360 260 220 200 190 44 1 0 790 560 260 2...

Page 5: ...e equipment By reducing the peak energy at the funda mental and harmonic frequencies the equipment under test is able to satisfy agency requirements for EMI Conventional methods of reducing EMI have b...

Page 6: ...k A very important charac teristic of the SSCG clock is that the bandwidth of the funda mental frequency is multiplied by the harmonic number In other words if the bandwidth of a 20 MHz clock is 200 k...

Page 7: ...e to LF pin as possible Crystal is 20 MHz is 1st Order with 18 pF load capacitance If Crystal load capacitance is different than 18 pF C1 and C2 must be re calculated For third overtone crystals a par...

Page 8: ...5V VDD 1 0 VDC VOL Output Low Voltage IOL 6 mA VDD 3 3V 0 4 VDC VOH Output High Voltage IOH 5 mA VDD 3 3V 2 4 VDC Rpd Resistor Pull down Pin 7 60K 125K 200K Rpu Resistor Pull up Pin 3 60K 125K 200K C...

Page 9: ...ercial 0 to 70 C IMIFS784BZB 8 pin 150 mil SOIC Commercial 0 to 70 C IMIFS784BZBT 8 pin 150 mil SOIC Tape and Reel Commercial 0 to 70 C IMIFS781BT 8 pin 4 4 mm body TSSOP Commercial 0 to 70 C IMIFS781...

Page 10: ...189 4 800 0 196 4 978 0 050 1 270 BSC 0 061 1 549 0 068 1 727 0 004 0 102 0 0098 0 249 0 0138 0 350 0 0192 0 487 0 016 0 406 0 035 0 889 0 0075 0 190 0 0098 0 249 1 DIMENSIONS IN INCHES MM MIN MAX 0 8...

Page 11: ...s in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application im...

Page 12: ...02 27 02 IKL Add new marking suffix for SOIC packages Converted to FrameMaker B 118355 08 30 02 RGL Swap the location of S0 and S1 in tables 2 and 3 in pages 2 3 and 4 C 122679 12 14 02 RBI Add power...

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