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CY7C1018DV33

Document #: 38-05465 Rev. *D

Page 5 of 9

Data Retention Characteristics

 (Over the Operating Range)

Parameter

Description

Conditions

Min.

Max.

Unit

V

DR

V

CC

 for Data Retention

2

V

I

CCDR

Data Retention Current

V

CC

 = V

DR

 = 2.0V, CE > V

CC

 – 0.3V,

V

IN

 > V

CC

 – 0.3V or V

IN

 < 0.3V

3

mA

t

CDR 

[3]

Chip Deselect to Data Retention Time

0

ns

t

R

[12]

Operation Recovery Time

t

RC

ns

Data Retention Waveform

Switching Waveforms 

Read Cycle No. 1 (Address Transition Controlled)

[13, 14]

Read Cycle No. 2 (OE Controlled)

[14, 15]

3.0V

3.0V

t

CDR

V

DR

2V

DATA RETENTION MODE

t

R

CE

V

CC

PREVIOUS DATA VALID

DATA VALID

RC

t

AA

t

OHA

t

RC

ADDRESS

DATA OUT

50%

50%

DATA VALID

t

RC

t

ACE

t

DOE

t

LZOE

t

LZCE

t

PU

HIGH IMPEDANCE

t

HZOE

t

HZCE

t

PD

HIGH 

ICC

ISB

IMPEDANCE

OE

CE

ADDRESS

DATA OUT

V

CC

SUPPLY

CURRENT

Notes

12. Full device operation requires linear V

CC

 ramp from V

DR 

to V

CC(min.)

 > 50 

µ

s or stable at V

CC(min.)

 > 50 

µ

s.

13. Device is continuously selected. OE, CE = V

IL

.

14. WE is HIGH for Read cycle.
15. Address valid prior to or coincident with CE transition LOW.

[+] Feedback 

Summary of Contents for CY7C1018DV33

Page 1: ...is then written into the location specified on the address pins A0 through A16 Reading from the device is accomplished by taking Chip Enable CE and Output Enable OE LOW while forcing Write Enable WE...

Page 2: ...emperature VCC Speed Industrial 40 C to 85 C 3 3V 0 3V 10 ns DC Electrical Characteristics Over the Operating Range Parameter Description Test Conditions 10 Industrial Unit Min Max VOH Output HIGH Vol...

Page 3: ...W JC Thermal Resistance Junction to Case 40 53 C W AC Test Loads and Waveforms 4 90 10 3 0V GND 90 10 ALL INPUT PULSES CAPACITIVE LOAD CONSISTS OF ALL COMPONENTS OF THE TEST ENVIRONMENT Rise Time 1 V...

Page 4: ...h Z 7 8 5 ns Notes 5 Test conditions assume signal transition time of 3 ns or less timing reference levels of 1 5V input pulse levels of 0 to 3 0V 6 tPOWER gives the minimum amount of time that the po...

Page 5: ...ad Cycle No 1 Address Transition Controlled 13 14 Read Cycle No 2 OE Controlled 14 15 3 0V 3 0V tCDR VDR 2V DATA RETENTION MODE tR CE VCC PREVIOUS DATA VALID DATA VALID RC tAA tOHA tRC ADDRESS DATA OU...

Page 6: ...W tSA tPWE tHA tHD tSD tSCE tSCE CE WE DATA I O ADDRESS tHD tSD tPWE tSA tHA tAW tSCE tWC tHZOE DATAIN VALID NOTE 18 CE ADDRESS WE DATA I O OE Notes 16 Data I O is high impedance if OE VIH 17 If CE go...

Page 7: ...C L H H High Z Selected Outputs Disabled Active ICC Ordering Information Speed ns Ordering Code Package Diagram Package Type Operating Range 10 CY7C1018DV33 10VXI 51 85041 32 pin 300 Mil Molded SOJ Pb...

Page 8: ...s Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury t...

Page 9: ...Offering in the Ordering Information B 262950 See ECN RKF Added Data Retention Characteristics table Added Tpower Spec in Switching Characteristics table Shaded Ordering Information C 307598 See ECN...

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