Cypress Semiconductor AN2309 Application Note Download Page 3

AN2309 

 

 

November 25, 2007 

Document No. 001-17394 Rev. *B 

 - 3 - 

 

Temperature gradient across the battery pack. 
Temperature mismatches of 15 degrees Celsius can 
cause up to 5- percent capacity differential among cells. 
Such a temperature gradient is relatively common in 
densely packed products, where multiple heat sources 
are located close to the battery pack. An example of 
this is a laptop computer.    

The main causes of variation in cell charge levels are: 

 

Variations in self-discharge rates. Even at room 
temperature, two similar cells self-discharge at different 
rates, resulting in a mismatch. For example, one cell 
could lose 3 percent per month, while another cell loses 
a different amount. 

 

Variations in internal cell impedance. These impedance 
variations cause otherwise similar battery cells to have 
different charge acceptance levels. This error is minute 
(about 0.1 percent).  

Cell  balancing  is  achieved  by  connecting  a  parallel  load  to 
each  cell  that  must  be  balanced.  Typically,  a  series 
combination of a power transistor (MOSFET) and a current-
limiting  resistor  are  connected  in  parallel  to  each  cell.  If  a 
cell  has  a  higher  voltage  than  the  other  cells,  the  bypass 
load to the cell is connected by closing the MOSFET so that 
a  fraction  of  the  charging  current  bypasses  that  cell.  It  is 
possible to balance the cells during the discharge phase, the 
charge phase, or both phases. 

Balancing  the  charge  levels  among  cells  must  be  done 
during  the  charge  or

 

discharge  phase.  This  balancing 

process is simple and has been well investigated. Balancing 
the  cells’  capacity

 

variation  must  be  done  during  both

 

the 

charge and discharge phases. Cells with different capacities 
must  be  charged  or  discharged  by  using  an  absolute  value 
rather  than  a  relative  value.  The  process  of  balancing  cell 
capacity  variation  is  difficult  to  implement  in  practice  and  is 
not intuitively obvious. 

The  charge  in  dV/dQ  for  Li-Ion  batteries  has  a  maximum 
level when the cells are nearly fully charged or discharged. It 
takes  less  time  to  correct  voltage  mismatch  during  this 
period  of  complete  or  nearly  complete  charge/discharge 
than  during  the  middle  period  of  battery  charge/discharge. 
Thus,  it  is  advisable  to  perform  the  balancing  routine  when 
the cells are nearly fully charged or nearly fully discharged.  
See  also 

Cell-Balancing  Algorithm

  on  page  14.  The  cell-

balancing technique is shown in 

Figure 1

.

 

Figure 1. Cell-Balancing Technique Schematic 

Charger,

Monitor,

Safety,

Fuel Gauge,

Cell Balance 

Software

Load

R1

R2

Q1

Q2

CELL1

CELL2

 

The  balancing  circuit  is  represented  by  (R1,  Q1)  and  (R2, 
Q2).  These  transistors  and  resistors  dissipate  energy  and 
control the amount of balancing current.  

If  cell  balancing  is  performed  during  the  charge  phase,  the 
charge  current  on  the  balanced  cells  is  reduced  on  the 
shunted  current  value  (

Equation  7

  and 

Equation  8

)  and 

remains unchanged on other cells:  

V

cellN

I

balN

R

R

N

QN

                    Equation 7                     

I

I

I

chargeN

charge

balN

         Equation 8 

The value

I

balN

 is the current that flows through the 

balancing circuit of the cell N, and 

V

cellN

 is the battery 

electro chemical potential. The value

R

N

 is the balancing 

resistor, and 

R

QN

 is the transistor resistance. The value 

I

chargeN

 is the charge current of cell N, and 

I

charge

 is 

the battery pack charge current. 

If  cell  balancing  is  performed  during  the  discharge  phase, 
the current that flows through the balancing circuit depends 
on the system load resistance. If the load resistance is high, 
by  comparison  with  a  balancing  circuit  resistance,  most  of 
the discharge current flows through the balancing circuit. But 
if  the  load  resistance  is  low,  most  of  the  discharge  current 
flows through the load, making the balancing operation less 
efficient.  

The current that flows through the balancing circuit is shown 
in 

Equation  7

  and  the  equivalent  discharge  resistance  is 

equated as:  

(

)

R

R

R

N

QN

load

R

dischargeN

R

R

R

N

QN

load

     Equation 9  

The  value 

R

dischargeN

  is  the  equivalent  discharge 

resistance  of  the  balanced  cell  N,  and   

R

load

  is  the  load 

resistance.  

Components  for  the  cell-balancing  circuit  are  selected  by 
taking the following factors into account:  

 

Amount of Imbalance

: This factor is described earlier 

in this section and consists of variations in capacity and 
charge level. Typically, cell imbalance is about 1 
percent. An imbalance as great as 5 percent to 15 
percent can occur only with a high temperature gradient 
or if a battery pack has been stored and not used for  a 
long period of time. 

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Summary of Contents for AN2309

Page 1: ...cells causes the following problems Reduced overall battery pack capacity to the value of the cell with the least capacity During the charge process this cell reaches the maximum charge level before t...

Page 2: ...e charge is Q I t C V Equation 2 Therefore Equation 1 can be transformed into the following equation 1 1 2 2 C V C V cell cell cell cell Equation 3 The value VcellN is the electrochemical potential of...

Page 3: ...of battery charge discharge Thus it is advisable to perform the balancing routine when the cells are nearly fully charged or nearly fully discharged See also Cell Balancing Algorithm on page 14 The c...

Page 4: ...device family for the same project the overnight conditioning cell balancing algorithm can easily be added see AN2258 Cell Balancing in a Multi Cell Li Ion Li Pol Battery Charger But for most applicat...

Page 5: ...l1 VREF Vref Vref Vref Vbias C1 Q4 C4 R4 R10 Q3 R8 R9 Current Sense The following abbreviations are used in Figure 3 RS_TX RS232 transmitter for debug purposes uses external level translator It monito...

Page 6: ...gnal from the PSoC The resistive network R6 R7 R12 R13 R15 R16 and R18 R22 and the reference voltage Vbias from the divider on R29 and D8 allow transformation of the battery current voltage and temper...

Page 7: ...2 P2 6 23 P0 0 24 P0 2 25 P0 4 26 P0 6 27 Vcc 28 U1 CY8C24423A VCC V1 V2 Vi2 Vbias R24 10K 1 LED_GREEN R16 1M 1 R15 1M 1 R21 200K 1 R20 200K 1 C8 0 1u Vi1 Vi2 Vi1 R14 100 C6 0 01u R17 1M R13 150K 0 1...

Page 8: ...set to 115200 baud The cell balancing MOSFETS Q4 Q5 are controlled directly from the CPU high level close low level open The three opamp topology of the instrumental amplifier INA is used in this imp...

Page 9: ...d down battery charger divider resistors of large nominal resistance are employed To provide higher current measurement accuracy a current sense resistor was put in the pack current path close to the...

Page 10: ...uring process by using external reference For temperature measurement a reference voltage resistive divider is employed based on a thermistor and a precision resistor R6 Thermistor resistance is calcu...

Page 11: ...lgorithms are described Two Cell Battery Charger Algorithm The two cell battery charge algorithm is implemented in the charger firmware as a state machine The following states are used Initialization...

Page 12: ...es jumps to the Wait For Temperature state when the battery temperature is outside the allowed temperature range For the Activation and Rapid states the allowed temperature range is the charge range F...

Page 13: ...t Error State And Error Code Yes No Check Charge Terminate Condition Set Charge Complete State Yes No Set Initialization State No No Send Debug Data Check Cell Balancing Interval Cell Balancing Yes No...

Page 14: ...its voltage has risen above 3 9 volts If the charging current is less than 1C this threshold can be reduced At this charge state the internal resistance drops below 0 2 and the distortion level is wit...

Page 15: ...balancing profile examples are shown in the Appendix Figure 14 on page 19 and Figure 15 on page 20 Figure 11 Cell Balancing Algorithm Start Chagre Off Balancing Reset DoCellBalancing FALSE Wait Start...

Page 16: ...ng Requirements TACT second Time Limit for Battery Activation Period TRAPID second Time Limit for Final Stage of Constant Charge Mode Voltage TCHARGE second Time Limit for Total Charge Period TTERM se...

Page 17: ...arise in a battery pack with two cells in series By altering several configuration parameters the cell balancing algorithm can easily be adapted for various applications and selected batteries A metho...

Page 18: ...ncing Profile Examples Figure 13 Charge Discharge Manager Profile Constant Current Charge Constant Voltage Charge Battery Discharge Cell Voltages Without Charge Interrupt Charger State Cell Balancing...

Page 19: ...AN2309 November 25 2007 Document No 001 17394 Rev B 19 Figure 14 Cell Balancing Activity Profile Voltage Imbalance Value Cell Voltages With Charge Interrupt Feedback...

Page 20: ...About the Author Name Oleksandr Karpin Title Application Engineer Background Oleksandr received a PhD s degree in computer science in 2008 from Lviv Polytechnic National University Ukraine His intere...

Page 21: ...cal control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support syste...

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