Curtiss-Wright SCRAMNet+ SC150e, Hardware Reference Manual

Page: 49 / 140

INSTALLATION
Copyright 2007 4-17 S SC150e HARDWARE REFERENCE
4.8.4 Node Identification
Each node on the ring must have a unique Node ID. To set the Node ID, write a unique
value 8-bit number between 0 and 255 to CSR3[15:8].
4.8.5 Network Time-out
The recommended value for the Network Time-out is:
# NODES IN RING + (TOTAL LENGTH OF CABLE IN METERS
÷
50) + 1
To set the network time-out value, write the result as a 16-bit hexadecimal number to
CSR5. This register has a “shadow register” which holds the network time-out value.
Each increment in the “shadow register” is worth approximately 240 ns. The time-out
will be 240 ns multiplied by the value written.
The time-out register is write only. If a read is performed, it will result in a read to the
Interrupt FIFO.
CAUTION
: Ensure a non-zero value is written to CSR5. A value of ‘0’ will keep host-
generated data from leaving the Transmit FIFO.
4.9 Byte Swapping
Some computer systems use different methods of byte ordering. Some have the byte
order arranged from right to left (Little Endian) and others have the byte order going
from left to right (Big Endian). Motorola is an example of a Big-Endian system. Intel is
an example of a Little-Endian system.
Table 4-6 is a simplified summary for 8-bit, 16-bit, and 32-bit byte ordering for big
endian and little endian.
Table 4-6 Byte Ordering Comparisons
Size Big Endian Little Endian
byte (8-bit) 12 34 56 78 78 56 34 12
shortword (16-bit) 1234 5678 5678 1234
longword (32-bit) 12345678 12345678
The SCRAMNet
-
LX, S and S SC150e product lines use the big-
endian ordering philosophy as the default for data passing. These cards do not have a
built-in byte-ordering conversion function. However, S and S
SC150e cards permit byte-swapping options via the V3 registers PCI_MAP0 and
PCI_MAP1.
Table 4-7 PCI_MAP0/PCI _MAP1 Swapping Options
Bits
9 8
Swapping Option
0 0 No Swapping
0 1 16-bit Swapping
1 0 8-bit Swapping
1 1 Reserved
The SC150e card allows byte swapping on an aperture basis; PCI_MAP0 controls
aperture 0, and PCI_MAP1 controls aperture 1. The options are shown in Table 4-7.