Curtiss-Wright GTS/DEC/006 Instructions Manual Download Page 7

GTS/DEC/006

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4 Apr. 2019 | DST/Y/040

CURTISSWRIGHTDS.COM 

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Between the power-on of the PC and the first run of decom software, the LEDs light orange as the state of the LEDs are 
undefined.

J1, J2, and J3 headers

The following figure shows the selection headers on the GTS/DEC/006 card. J1 is used for PCM_IN_ANALOG(0), J2 is used for
PCM_IN_ANALOG(1) and J3 is used for PCM_IN_ANALOG(2).

Figure 3: J1, J2, and J3 selection headers

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An RS-422 signal can be connected to the GTS/DEC/006 as a single ended input, by connecting either the (+) or (-) of the 
RS-422 signal and the RS-422's ground reference to the GTS/DEC/006 bit sync input and ground.

SMART_OUT output

The GTS/DEC/006 has a programmable output which can output one of the following signals when selected.   

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SSS

Lights solid green when the Smart Source Selector is in a lock state and at least two channels are 
combining; when not lit, the aligner is not able to find the alignment point in the data.

PINS

DESCRIPTION

1

Connects a 50Ω load between the + input and GND for single ended input (default).

2

Connects a 75Ω load between the + input and GND for single ended input.

3

Connects the - input to GND for single ended input (default).

4

Connects a 120Ω load between the + input and the - input for differential ended signals.

TABLE 12

 Programmable output signals

SELECTED OUTPUT

DESCRIPTION

Minor frame pulse

High for last bit in sync word for at least 4 to 16 bits in frame (per decom channel).

Sync word found pulse

High for last bit in sync word location for at least 4 to 16 bits in frame (per decom channel).

Word pulse

High for last bit in word (per decom channel).

1 PPS pulse from IRIG_B time

Width of 1 PPS pulse is 16ns (high for 16ns every second).

TABLE 11

Status LED description

LED

NAME

DESCRIPTION

Single ended input
(50Ω termination)

Single ended input
(75Ω termination)

Differential ended input
(120Ω termination)

Shunts at pins 
1 and 3 (default)

Place shunts at 
pins 2 and 3

Place shunt at pin 4

J1 header

J2 header

J3 header

Summary of Contents for GTS/DEC/006

Page 1: ...emetry data links Overview The GTS DEC 006 reconstructs a serial PCM data stream from a source that has been corrupted by noise phase jitter amplitude modulation or base line variations The all digital design utilizes three independent programmable matched filters and Phase Locked Loops PLL to track deviations in the bit rate of the received signals The output from the bit synchronizers is fed int...

Page 2: ... W Environmental ratings operating temperature 10 50 C storage temperature 25 70 C TABLE 2 BTTL inputs PARAMETER MIN TYP MAX UNITS CONDITION DETAILS Inputs 3 Signaling rate PCM_IN_DCLK 0 20 Mbps PCM_IN_DATA 0 20 Mbps NRZ L M S RNRZ L 11 13 15 17 23 PCM_IN_DATA 0 10 Mbps BIØ L IRIG B_IN 1 Mbps Digital IRIG B 000 001 002 003 time formats Input voltage operating range 0 5 5 V logic 0 0 8 V logic 1 2 ...

Page 3: ...TER MIN TYP MAX UNITS CONDITION DETAILS Outputs 5 Signaling rate BITSYNC_OUT_DATA 0 20 Mbps NRZ L M S RNRZ L 11 13 15 17 23 BITSYNC_OUT_DATA 0 10 Mbps BIØ L BITSYNC_OUT_DCLK 0 20 MHz LOOPBACK_OUT_DATA 20 Mbps NRZ L M S RNRZ L 11 13 15 17 23 LOOPBACK_OUT_DATA 10 Mbps BIØ L LOOPBACK_OUT_DCLK 20 MHz SMART_OUT For details see SMART_OUT output on page 5 Output voltage absolute operating range 7 12 V Ab...

Page 4: ...BIØ L 0 064 10 000 kbps Maximum DC offset single ended 5 5 V differential ended 10 10 V TABLE 6 Bit synchronizer performance PARAMETER MIN TYP MAX UNITS CONDITION DETAILS Loop bandwidth 0 01 2 0 Offset bandwidth 100 Gain bandwidth 100 Acquisition range 0 04 5 Tracking range 0 1 20 Bit Error Rate 0 2 1 dB Deviation from theory Sync maintenance Retains sync with NRZ codes at EbNo 3dB with 248 transi...

Page 5: ...ting XidML metadata files and programming the card It also offers real time access to decommutated data with time tags and status registers Bit synchronizer performance tuning If offset modulation is affecting performance adjust the offset bandwidth from 100 downwards to compensate Likewise if amplitude modulation is affecting performance decrease the gain bandwidth TABLE 8 Bit synchronizer settin...

Page 6: ...llow system checks The loopback tester transmits frames as configured in the XidML setup The loopback tester allows for dynamic and fixed data to be transmitted The first eight parameters transmitted are dynamic counters that rollover to zero The rest of the parameters are a fixed word which is 0x1234 At present the loopback tester only generates the minor frame layout as given in the configuratio...

Page 7: ...t the aligner is not able to find the alignment point in the data PINS DESCRIPTION 1 Connects a 50Ω load between the input and GND for single ended input default 2 Connects a 75Ω load between the input and GND for single ended input 3 Connects the input to GND for single ended input default 4 Connects a 120Ω load between the input and the input for differential ended signals TABLE 12 Programmable ...

Page 8: ...idth can be set Maximum Stuck Bit Length This setting is used to determine when a channel is considered stuck at 1 or 0 due to bad signal conditions That is the design allows a sequence for up to 48 default bits to be 1 or 0 without change before it declares the channel to be stuck If you are using line codes such as RNRZ L or Bi Phase L the setting never comes into effect since you always have tr...

Page 9: ...nect 20 GND GTS 500 internal ground 21 DNC Do not connect 22 GND GTS 500 internal ground 23 BITSYNC_OUT_DCLK 0 RS 422 outputs Differential ended bit synchronizer clock output 24 BITSYNC_OUT_DCLK 0 RS 422 outputs Differential ended bit synchronizer clock output 25 BITSYNC_OUT_DATA 0 RS 422 outputs Differential ended bit synchronizer data output 26 BITSYNC_OUT_DATA 0 RS 422 outputs Differential ende...

Page 10: ...ing software Related products Related documentation PART NUMBER DESCRIPTION GTS DEC 006 C Smart Source Selector and PCM decommutator PCI board 20Mbps 3ch REVISION DIFFERENCES STATUS GTS DEC 006 C First release Recommended for new programs SOFTWARE DETAILS GTS SDK 3 Software development kit for GTS boards XidML 3 0 DAS Studio 3 User interface for setup and management of data acquisition network swi...

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