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Mixer Chip Programming

4-7

Stereo Digitized Sound Output Switch

There is a switch on CT1345 to toggle digitized sound output data between the left
and right DAC channels. The first digitized sound data byte will be directed to the
left channel.

It must be switched "On" for stereo digitized sound output.

Register Functions

The following notations are used to describe the detailed register map of CT1345:

“.L” stands for left channel and “.R” stands for right channel.

"0xRR" represents the mixer register number in hexadecimal. If
"0xRR:D,D" is used, this means only the particular bit D is used to control
the mixer element (comma is used to separate the bits if more than one bit
is used to control the element). The entire register is dedicated to the
mixer element if D is omitted.

The grayed areas of the table represent reserved bits.

Index

D7

D6

D5

D4

D3

D2

D1

D0

0x00

Reset Mixer

0x04

Voice volume.L

Voice volume.R

0x0A

Mic volume

0x0C

Input
Filter

Low-Pass

Filter

Input Source

0x0E

Output

Filter

Stereo
Switch

0x22

Master volume.L

Master volume.R

0x26

MIDI volume.L

MIDI volume.R

0x28

CD volume.L

CD volume.R

0x2E

Line volume.L

Line volume.R

Figure 4-2: Register Map of CT1345 Mixer

The function of each register is discussed below:

Register 0x00 (Reset Mixer)

Write any 8-bit value to this register to reset the mixer. After a reset, all the
registers will be restored to their default values.

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Summary of Contents for SB0350

Page 1: ...Sound Blaster Series Hardware Programming Guide Hardware Overview Digital Sound Processor Mixer MIDI Port ...

Page 2: ...TRICTIONS ON USE Creative Technology Ltd retains title and ownership of the manual and software as well as ownership of the copyright in any subsequent copies of the manual and software irrespective of the form of media on or in which the manual and software are recorded or fixed By downloading and or using this manual and software Licensee agrees to be bound to the terms of this agreement and fur...

Page 3: ...es so the above limitations and exclusions may not apply to you Information in this document is subject to change without notice Creative Technology Ltd shall have no obligation to update or otherwise correct any errors in the manual and software even if Creative Technology Ltd is aware of such errors and Creative Technology Ltd shall be under no obligation to provide to Licensee any updates corre...

Page 4: ...4 Block Diagrams for Sound Blaster Family of Audio Cards 1 6 Chapter 2 Introduction to DSP Programming DSP I O Addresses 2 2 Resetting DSP 2 2 Reading from DSP 2 3 Writing to DSP 2 4 Handling Interrupts from DSP 2 4 Sharing of Interrupts 2 5 Configuring DMA and Interrupt Settings 2 6 Chapter 3 Digitized Sound I O Programming Digitized Sound Operation Modes 3 2 Digitized Sound Data Format 3 2 Digit...

Page 5: ...t or 16 bit Single cycle Transfer 3 25 8 bit or 16 bit Auto initialize Transfer 3 27 Chapter 4 Mixer Chip Programming Programming Sequence 4 2 CT1335 Mixer 4 4 Features 4 4 Register Functions 4 4 CT1345 Mixer 4 6 Features 4 6 Register Functions 4 7 CT1745 Mixer 4 10 Features 4 10 Register Functions 4 11 Chapter 5 MIDI Port I O Programming SB MIDI Mode 5 2 I O Addresses 5 2 Sending MIDI Data 5 3 Re...

Page 6: ... A 3 SB2 0 I O Address Map A 4 SB2CD I O Address Map A 5 SBPRO I O Address Map A 6 SBPRO MCV I O Address Map A 9 SB16 I O Address Map A 10 Appendix B File Format Creative Voice File VOC Format B 2 Header Block B 2 Data Block B 3 Creative ADPCM Wave Type Format B 12 Appendix C Relevant Information Index ...

Page 7: ... the Output Mixing Paths 4 13 Figure 4 5 Logical Schematic of the Input Mixing Paths 4 14 Tables Table 2 1 DSP I O Ports 2 2 Table 3 1 DMA Operation Modes Supported 3 7 Table 3 2 Digitized Sound Output Capabilities 3 8 Table 3 3 Digitized Sound Input Capabilities 3 9 Table 5 1 MPU 401 I O Ports 5 5 Table A 1 SB1 5 I O Ports A 2 Table A 2 SB1 5 I O Port Functions A 2 Table A 3 SBMCV I O Ports A 3 T...

Page 8: ...amely the Digital Sound Processor DSP Mixer chip and MIDI Port The Digital Sound Processor handles digitized sound recording and playback It supports 8 or 16 bit digitized sound Digitized sound I O can be carried out in mono or stereo using Single cycle or Auto initialize DMA modes The Digital Sound Processor also supports real time decompression of ADPCM in three compressed formats 8 to 4 bits 8 ...

Page 9: ...and DMA channels of Sound Blaster cards Some chapters in this manual assume additional knowledge on your part The introductions to these chapters will list these assumptions Scope and Manual Organization This manual focuses on the Creative specific hardware programming of the following Digital Sound Processor Mixer Chip MIDI Port Refer to Appendix B Relevant Information if you are interested in pr...

Page 10: ...ces of the other relevant materials Document Conventions In this manual the word you refers to you the developer or sometimes your application The word user does not refer to you but to the person who uses your applications SB1 5 SB2 0 and SBMCV are referred to collectively as Sound Blaster SBPRO and SBPRO MCV are referred to collectively as Sound Blaster Pro SB16 and Sound Blaster 16 with Advance...

Page 11: ... may also be used to emphasize certain words program This font is used for example codes program fragment Vertical ellipsis in an example program indicates that part of the program has been intentionally omitted Square brackets in a command line indicate that the enclosed item is optional It should not be typed verbatim Angle brackets in a command line indicate that you must provide the actual val...

Page 12: ...er cards and their respective DSP version numbers Cards Version Number SB1 5 SBMCV 1 xx to 2 00 SB2 0 2 01 SBPRO SBPRO MCV 3 xx SB16 Sound Blaster 16 with Advanced Signal Processing 4 xx The DSP version can be retrieved by issuing DSP command E1h This will be covered in the subsequent chapters There are two versions of SBPRO The difference is in the FM chip used The earlier version uses a two oper...

Page 13: ...t Note that there is no space before and after the equal sign but there must be at least one space between each setting Some of the cards may have fewer environment parameters For instance 8 bit sound cards do not have the Hh parameter in the parameter string If Mmmm is not specified the mixer chip base I O port will be the same as the card s base I O port On Sound Blaster 16 16 bit sound data is ...

Page 14: ...und Blaster family of audio cards It is meant for developers who intend to do hardware level programming Major building blocks of the Sound Blaster family cards and their functionalities will be discussed This chapter also covers the anatomy and block diagrams of Sound Blaster family of audio cards ...

Page 15: ...the Sound Blaster card It interprets the DSP commands and then carries out one of the following tasks Performs 8 16 bit Mono Stereo digitized sound recording and playback Performs 4 1 3 1 and 2 1 ADPCM decompression in Sound Blaster mode Control the sampling rate Interprets Sound Blaster compatible MIDI and MPU 401 UART mode commands Sound Blaster 16 only Provides communication path between Host a...

Page 16: ...s has mixer chip Currently there are three versions of mixer chip CT1335 CT1345 and CT1745 Each version differs from the other by their ability to accept different number of sources and to provide volume control resolution CT1745 the latest version of mixer chip can provide a finer resolution of volume control In the chapter on Mixer Chip Programming each of these mixer chips as well as the includ...

Page 17: ...essor Chip The Advanced Signal Processor used on Sound Blaster 16 Advanced Signal Processing cards is a technological breakthrough It can perform high speed mathematical processing on digitized sound data It also provides real time signal processing like compression decompression of sound The flexibility of the chip is that it can accept the downloading of algorithms Below is a simplified block di...

Page 18: ... RAM 512 x 16 bit data memory Serial I O for digital audio data Runs at 12 MIPs The control of the Advanced Signal Processor including downloading is handled by a device level driver called CSP SYS You can access this device driver via the Creative Multimedia System CTMMSYS driver Refer to the chapters Creative Multimedia System Driver in the Programmer s Guide and Library Reference manuals for de...

Page 19: ... R AD DA FILTER MIDI P O R T C M S A G C P O W E R AMP S P K R ISA B U S C O N T R O L COMMAND DATA MIC LINE IN Figure 1 2 Block Diagram of the Sound Blaster 2 0 Note that the CMS chip is optional The CMS uses Pulse Width Modulation PWM technique to synthesize music The quality of the sound is not as good as that from a FM synthesizer and therefore has been gradually phased out All Sound Blaster c...

Page 20: ...ROM Drive SPKR MUSIC IN VOICE IN CD IN Figure 1 3 Block Diagram of the Sound Blaster 2 0 CD Interface The SB2CD is the CD ROM upgrade for SB2 0 It provides a CD ROM interface which the SB2 0 does not have It also includes an audio mixer for software volume control and a power amplifier ...

Page 21: ...und Blaster Pro Sound Blaster Pro is a 8 bit stereo sampling card with stereo mixer chip and CD ROM interface built in The DSP has been gradually enhanced to cover wider sampling range There are two versions of Sound Blaster Pro The different is in the FM synthesizer chip used The earlier version uses a two operator FM chip known as OPL2 while the later version uses a four operator FM synthesizer ...

Page 22: ...1 5 Block Diagram of the Sound Blaster 16 Advanced Signal Processing Sound Blaster 16 Advanced Signal Processing is a 16 bit stereo sampling card It also features an enhanced stereo mixer chip MPU 401 UART mode MIDI interface has also been added One of the key component is the Advanced Signal Processor which can perform high speed mathematical processing on the data from to the AD DA Sound Blaster...

Page 23: ...andles digitized sound I O and MIDI operations You must read this chapter carefully to ensure you understand the characteristics of the DSP before you proceed to program digitized sound or MIDI operations This chapter covers the following topics DSP I O addresses Resetting the DSP Reading from the DSP Writing to the DSP Handling interrupt from the DSP ...

Page 24: ...there is any in bound data available for reading Table 2 1 DSP I O Ports Resetting DSP The DSP has to be reset before it is first programmed The reset causes it to perform an initialization and returns it to its default state The DSP reset is done through the Reset port After the initialization the DSP returns a data byte 0AAh at the Read Data port The procedure to reset the DSP is as follows 1 Wr...

Page 25: ...lable jns NextAttempt Bit 7 clear try again sub dl 4 Read Data port 2xAh in al dx Read in bound DSP data cmp al 0AAh Receive success code 0AAh je ResetOK SUCCESS NextAttempt loop Empty Try again Failed to reset DSP Sound Blaster not detected Reading from DSP When DSP data is available it can be read in from the Read Data port Before the data is read in bit 7 of the Read Buffer Status port must be ...

Page 26: ...e DSP mov dx wSBCBaseAddx SBC base I O address 2x0h add dl 0Ch Write Buffer Status port 2xCh Busy in al dx Read Write Buffer Status port or al al Can write to DSP js Busy Bit 7 set try again mov al bData Get DSP command or data out dx al Send to DSP Handling Interrupts from DSP The DSP generates a hardware interrupt for each of the following processes DMA mode ADC DMA mode DAC Interrupt mode MIDI ...

Page 27: ...D7 D6 D5 D4 D3 D2 D1 D0 MPU 401 16 bit DMA mode digitized sound I O 8 bit DMA mode digitized sound I O SB MIDI where the grayed areas denote reserved bits A bit is set to 1 if the corresponding interrupt is triggered To send an interrupt acknowledgment signal to the DSP perform a read in from one of three I O ports with in al dx where register DX has been pre loaded with 2xEh for 8 bit DMA mode di...

Page 28: ...Fh 3 Send EOI to the Programmable Interrupt Controller jmp ExitISR ChainPreviousISR Chain to previous ISR ExitISR Configuring DMA and Interrupt Settings With the DSP version 4 xx the DMA channels Interrupt Request IRQ line are software configurable The Interrupt Setup register addressed as register 80h on the Mixer register map is used to configure or determine the Interrupt Request line The DMA S...

Page 29: ......

Page 30: ...the DMA controller and the Programmable Interrupt Controller This chapter is divided into two sections The first section describes the various digitized sound operation modes The second section provides the step by step procedures needed to perform the various modes of digitized sound operation described in the first part Simple C language I O port instructions are also included in the second sect...

Page 31: ... speed DMA mode digitized sound I O Adaptive Delta Pulse Code Modulation ADPCM DMA mode digitized sound I O DSP digitized sound I O capability Digitized Sound Data Format The digitized sound data is in Pulse Code Modulation PCM format For 8 bit PCM data each sample is represented by an unsigned byte For 16 bit PCM data each sample is represented by a 16 bit signed value The maximum and minimum val...

Page 32: ...Channel 0 Channel 0 Figure 3 2 Order of 8 bit mono PCM data sample 1 sample 2 Channel 0 left Channel 1 right Channel 0 left Channel 1 right Figure 3 3 Order of 8 bit stereo PCM data sample 1 sample 2 Channel 0 Low byte Channel 0 High byte Channel 0 Low byte Channel 0 High byte Figure 3 4 Order of 16 bit mono PCM data sample 1 Channel 0 left Low byte Channel 0 left High byte Channel 1 right Low byt...

Page 33: ...on DSP commands for the commands to set the digitized sound I O transfer rate Direct Mode Direct mode digitized sound I O should be used when direct data input from or output to the DSP is required Under direct mode only mono 8 bit unsigned PCM data transfer is supported The data transfer rate of direct mode is controlled by the application program itself Usually the timer interrupt is used to fac...

Page 34: ... sub blocks are transferred until the data is exhausted Under single cycle DMA mode 8 bit unsigned PCM 16 bit signed PCM and ADPCM compressed data transfers are supported Auto initialize DMA Mode In auto initialize DMA mode digitized sound I O transfer the DMA controller and DSP need only be programmed once with the block transfer size for the transfer to begin When the DMA controller s transfer c...

Page 35: ...ock of data The delay between the blocks though it may be brief is enough to distort the sound High Speed DMA Mode For non high speed DMA mode the DSP operates in the command and data modes That is the DSP is able to accept and execute commands that are sent to the DSP Command Data port Using this mode the DSP can only support data transfer up to a certain sampling rate To go beyond that the DSP h...

Page 36: ... code but an actual data byte value This byte is used by the DSP as a reference during the data decompression There are three ADPCM compression techniques supported by the DSP 8 bit to 2 bit 8 bit to 3 bit and 8 bit to 4 bit There are two different sets of output commands used to operate on data blocks The first block of data to be transferred which contains a reference byte uses one set of comman...

Page 37: ...on Mode 1 xx 2 00 2 01 3 xx 4 xx 8 bit Mono PCM Single cycle 9 9 9 9 9 8 bit Mono PCM Auto initialize 9 9 9 9 8 bit Mono ADPCM Single cycle 9 9 9 9 9 8 bit Mono ADPCM Auto initialize 9 9 9 9 8 bit Mono PCM High Speed Single cycle 9 9 8 bit Mono PCM High Speed Auto initialize 9 9 8 bit Stereo PCM High Speed Single cycle 9 8 bit Stereo PCM High Speed Auto initialize 9 8 bit 16 bit Mono PCM Single cy...

Page 38: ...no Normal 16 bit signed 5000 to 44100 Hz Stereo Normal 8 bit unsigned 5000 to 44100 Hz Stereo Normal 16 bit signed 5000 to 44100 Hz 3 xx Mono Normal 8 bit unsigned 4000 to 23000 Hz Mono High Speed 8 bit unsigned 23000 to 44100 Hz Stereo High Speed 8 bit unsigned 11025 and 22050 Hz 2 01 Mono Normal 8 bit unsigned 4000 to 23000 Hz Mono High Speed 8 bit unsigned 23000 to 44100 Hz 2 00 and 1 xx Mono N...

Page 39: ...l 8 bit unsigned 5000 to 44100 Hz Stereo Normal 16 bit signed 5000 to 44100 Hz 3 xx Mono Normal 8 bit unsigned 4000 to 23000 Hz Mono High Speed 8 bit unsigned 23000 to 44100 Hz Stereo High Speed 8 bit unsigned 11025 and 22050 Hz 2 01 Mono Normal 8 bit unsigned 4000 to 13000 Hz Mono High Speed 8 bit unsigned 13000 to 15000 Hz 2 00 and 1 xx Mono Normal 8 bit unsigned 4000 to 13000 Hz Table 3 3 Digit...

Page 40: ...cle DMA mode transfer 8 bit stereo PCM high speed auto initialize DMA mode transfer 8 bit or 16 bit PCM single cycle DMA mode transfer 8 bit or 16 bit PCM auto initialize DMA mode transfer To help you utilize the sample procedures more effectively we have also included simple C language I O port instructions along with the discussions In order to focus on the key steps involved the checking of the...

Page 41: ...an interrupt at the end of each DSP block transfer The following lists the general actions needed in the interrupt service routine to handle the interrupt 1 Preserve machine status 2 Goto 5 if no more data blocks to transfer Depending on the operation mode perform 3a and 4a if you are using single cycle mode or 3b and 4b if you are using auto initialize mode 3a Program the DMA controller for the n...

Page 42: ...x40 outp wSBCBaseAddx 0xC bTimeConstant 6 Send an I O command followed by data transfer count outp wSBCBaseAddx 0xC bCommand outp wSBCBaseAddx 0xC wLength LowByte outp wSBCBaseAddx 0xC wLength HighByte bCommand is one of the following bCommand Description 24h 8 bit PCM input 14h 8 bit PCM output 75h 8 bit to 4 bit ADPCM output with reference byte 77h 8 bit to 3 bit ADPCM output with reference byte...

Page 43: ...llowing bCommand Description 24h 8 bit PCM input 14h 8 bit PCM output 74h 8 bit to 4 bit ADPCM output without reference byte 76h 8 bit to 3 bit ADPCM output without reference byte 16h 8 bit to 2 bit ADPCM output without reference byte Please note that for ADPCM output subsequent data block transfers must be programmed using different commands specifically those that do not take a reference byte At...

Page 44: ...er Time Constant outp wSBCBaseAddx 0xC 0x40 outp wSBCBaseAddx 0xC bTimeConstant 7 Set the DSP block transfer size outp wSBCBaseAddx 0xC 0x48 outp wSBCBaseAddx 0xC wBlkSize LowByte outp wSBCBaseAddx 0xC wBlkSize HighByte If an 8KB DMA buffer is used the DSP block transfer size should be set to 4KB At the end of every 4KB transfer the DSP will generate an interrupt to the application until the exit ...

Page 45: ... auto initialize DMA mode immediately at the end of the current block transfer 2b Program the DSP for single cycle DMA mode transfer outp wSBCBaseAddx 0xC bCommand outp wSBCBaseAddx 0xC wLength LowByte outp wSBCBaseAddx 0xC wLength HighByte bCommand is one of the following bCommand Description 24h 8 bit PCM input 14h 8 bit PCM output 74h 8 bit to 4 bit ADPCM output without reference byte 76h 8 bit...

Page 46: ...transfer Time Constant outp wSBCBaseAddx 0xC 0x40 outp wSBCBaseAddx 0xC bTimeConstant 6 Set the DSP transfer block size outp wSBCBaseAddx 0xC 0x48 outp wSBCBaseAddx 0xC wBlkSize LowByte outp wSBCBaseAddx 0xC wBlkSize HighByte wBlkSize is one byte less than the actual data transfer size 7 Send an I O command to start high speed single cycle DMA mode transfer outp wSBCBaseAddx 0xC bCommand bCommand ...

Page 47: ...f the DAC speaker outp wSBCBaseAddx 0xC 0xD3 2 Disable the interrupt used 3 Restore the original interrupt service routine During high speed DMA mode data I O the DSP will not accept any commands Hence to stop data transfer before the end of a block send the reset DSP command ...

Page 48: ...nstant outp wSBCBaseAddx 0xC 0x40 outp wSBCBaseAddx 0xC bTimeConstant 7 Set the DSP block transfer size outp wSBCBaseAddx 0xC 0x48 outp wSBCBaseAddx 0xC wBlkSize LowByte outp wSBCBaseAddx 0xC wBlkSize HighByte If an 8KB DMA buffer is used the DSP block transfer size should be set to 4KB At the end of every 4KB transfer the DSP will generate an interrupt to the application until the exit auto initi...

Page 49: ...speed auto initialize DMA mode send the reset DSP command At the end of data transfer 1 Turn off the DAC speaker outp wSBCBaseAddx 0xC 0xD3 2 Disable the interrupt used 3 Restore the original interrupt service routine 4 Release the allocated DMA buffer ...

Page 50: ...BCBaseAddx 0x5 outp wSBCBaseAddx 0x5 bTmp 0x2 ii Program the DMA controller for one byte single cycle output iii Program the DSP to output one silent byte value 0x80 outp wSBCBaseAddx 0xC 0x14 outp wSBCBaseAddx 0xC 0 outp wSBCBaseAddx 0xC 0 iv Upon receiving a DSP interrupt acknowledge the DSP then exit the ISR 5 Program the DMA controller for 8 bit single cycle DMA mode transfer 6 Set the DSP tra...

Page 51: ...ntroller for subsequent block 2 Set the DSP block size and program the DSP for the next block At the end of data transfer 1 Restore the filter status a For stereo input outp wSBCBaseAddx 0x4 0xC outp wSBCBaseAddx 0x5 bInputFilter b For stereo output outp wSBCBaseAddx 0x4 0xE outp wSBCBaseAddx 0x5 bOutputFilter 2 Set the hardware to mono mode a For stereo input outp wSBCBaseAddx 0xC 0xA0 b For ster...

Page 52: ...o output i Set stereo mode outp wSBCBaseAddx 0x4 0xE bTmp inp wSBCBaseAddx 0x5 outp wSBCBaseAddx 0x5 bTmp 0x2 ii Program the DMA controller for one byte single cycle output iii Program the DSP to output one silent byte value 0x80 outp wSBCBaseAddx 0xC 0x14 outp wSBCBaseAddx 0xC 0 outp wSBCBaseAddx 0xC 0 iv Upon receiving a DSP interrupt acknowledge the DSP then exit the ISR 6 Program the DMA contr...

Page 53: ...output Upon receiving an interrupt from the DSP the following step should be done in the interrupt service routine 1 Transfer data between the DMA buffer and the storage buffer To stop high speed auto initialize DMA mode send the reset DSP command At the end of data transfer 1 Restore the filter status a For stereo input outp wSBCBaseAddx 0x4 0xC outp wSBCBaseAddx 0x5 bInputFilter b For stereo out...

Page 54: ...0xC 0xD3 4 Disable the interrupt used 5 Restore the original interrupt service routine 6 Release the allocated DMA buffer During high speed DMA mode data I O the DSP will not accept any further commands Hence to stop data transfer before the end of a block send the reset DSP command ...

Page 55: ...dx 0xC wSamplingRate HighByte outp wSBCBaseAddx 0xC wSamplingRate LowByte bCommand is one of the following bCommand Description 42h Input 41h Output Contrast the sampling rate with the DSP transfer Time Constant For example at a 44100 Hz sampling rate wSamplingRate HighByte ACh and wSamplingRate LowByte 44h 5 Send an I O command followed by the transfer mode and the data transfer count outp wSBCBa...

Page 56: ...es to be transferred The transfer begins here The DSP will generate an interrupt after transferring the programmed number of samples Upon receiving an interrupt from the DSP the following steps should be done in the interrupt service routine 1 Program the DMA controller for the next block 2 Program the DSP for the next block step 5 shown above At the end of data transfer 1 Disable the interrupt us...

Page 57: ...sfer sampling rate outp wSBCBaseAddx 0xC bCommand outp wSBCBaseAddx 0xC wSamplingRate HighByte outp wSBCBaseAddx 0xC wSamplingRate LowByte bCommand is one of the following bCommand Description 42h Input 41h Output Contrast the sampling rate with the DSP transfer Time Constant For example at a 44100 Hz sampling rate wSamplingRate HighByte ACh and wSamplingRate LowByte 44h 6 Send an I O command foll...

Page 58: ...1 Transfer data between the DMA buffer and the storage buffer To stop auto initialize DMA mode you can either send the exit auto initialize DMA mode command or program the DSP for single cycle DMA mode transfer 2a Send the exit auto initialize DMA mode command outp wSBCBaseAddx 0xC 0xDA for 8 bit transfer outp wSBCBaseAddx 0xC 0xD9 for 16 bit transfer Upon receiving the exit auto initialize DMA mo...

Page 59: ...Sound Blaster 16 This chapter discusses the essentials for programming the mixer chips It covers the following topics features of the mixer chips programming sequence of the mixer chips register functions of the mixer chips In the following discussions we will first present the sequence to access the mixer chip This sequence applies to all the mixer chips Subsequently the features and register fun...

Page 60: ...egister to the Address Port 2 write read the mixer register value to from the Data Port The following assembly code fragment shows the process of accessing a mixer register Common setup code Specify which register to access mov dx wSBCBaseAddx Base I O address add dx 4 Mixer address port mov al bMixerRegIndex Index of mixer s register out dx al Select the register inc dx Mixer data port Write to t...

Page 61: ...when testing 2 Do not depend on the values of any undefined bits when storing them to memory or another register 3 Do not depend on any reserved bits ability to retain information 4 When writing to a mixer register you should always read back the current value of the register and only alter the bit settings which you wish to change 5 When writing to a mixer register always set the reserved bit to ...

Page 62: ... 4 levels of volume control Output Mixing The output mixing path takes signals from the Voice MIDI and CD as well as the PC Speaker To silence a source you can either reduce the source volume to zero or terminate the source activity Register Functions The following notations are used to describe the detailed register map of CT1335 0xRR represents the mixer register number in hexadecimal The grayed...

Page 63: ... restored to their default values Register 0x02 Master volume Register 0x06 MIDI volume 3 bits giving 8 levels 0 to 7 46 dB to 0 dB in approximate 4 dB steps Default is 4 11 dB Register 0x08 CD volume 3 bits giving 8 levels 0 to 7 46 dB to 0 dB in approximate 4 dB steps Default is 0 46 dB Register 0x0A Voice volume 2 bits giving 4 levels 0 to 3 46 dB to 0 dB in approximate 7 dB steps Default is 0 ...

Page 64: ...hone output mixing source is mono with 4 levels of volume control This control will not affect the amplitude of a recorded signal but only affects the output mixing level Output Mixing The output mixing path takes signals from the Voice MIDI CD and Microphone as well as the PC Speaker To silence a source you can either reduce the source volume to zero or terminate the source activity Input Source ...

Page 65: ...rol the mixer element comma is used to separate the bits if more than one bit is used to control the element The entire register is dedicated to the mixer element if D is omitted The grayed areas of the table represent reserved bits Index D7 D6 D5 D4 D3 D2 D1 D0 0x00 Reset Mixer 0x04 Voice volume L Voice volume R 0x0A Mic volume 0x0C Input Filter Low Pass Filter Input Source 0x0E Output Filter Ste...

Page 66: ...Hz low pass filter 1 8 8 kHz low pass filter Default is 0 3 2 kHz low pass filter Register 0x0C 5 Input Filter Input filter off switch 0 Input filter on pass through low pass filter 1 Input filter off bypass low pass filter Default is 0 Input filter on The low pass filter is used to filter off high frequency signals during recording to achieve better recording quality As a general guide use the 3 ...

Page 67: ...ough low pass filter 1 Output filter off bypass the low pass filter Default is 0 Output filter on Turn off the filter for high sampling rates or stereo output Register 0x04 Voice volume L R Register 0x22 Master volume L R Register 0x26 MIDI volume L R 3 bits per channel giving 8 levels 0 to 7 46 dB to 0 dB in approximate 4 dB steps Default is 4 11 dB Register 0x28 CD volume L R Register 0x2E Line ...

Page 68: ...the source activity is to turn the source volume down to zero On the CT1745 three of the sources Mic CD and Line In can be silenced by toggling some mixer switches to cut off these three sources from the output mixing path Input Mixing Control In contrast to CT1345 which only allows single source recording CT1745 supports recording from the Mic CD Line In and MIDI sources concurrently Just as for ...

Page 69: ...Mic volume control now genuinely affects the signal amplitude for recording on CT1345 it only affects the output level Register Functions Besides the detailed register map logical schematic diagrams of the input and output mixing paths are also included to aid in understanding the mixer chip The following notations are used to describe the detailed register map of CT1745 L stands for left channel ...

Page 70: ...ce volume R 0x34 MIDI volume L 0x35 MIDI volume R 0x36 CD volume L 0x37 CD volume R 0x38 Line volume L 0x39 Line volume R 0x3A Mic volume 0x3B PC Speaker volume 0x3C Output mixer switches Line L Line R CD L CD R Mic 0x3D Input Mixer L switches MIDI L MIDI R Line L Line R CD L CD R Mic 0x3E Input Mixer R switches MIDI L MIDI R Line L Line R CD L CD R Mic 0x3F Input Gain L 0x40 Input Gain R 0x41 Out...

Page 71: ...Mixer Chip Programming 4 13 Figure 4 4 Logical Schematic of the Output Mixing Paths ...

Page 72: ...4 14 Mixer Chip Programming Figure 4 5 Logical Schematic of the Input Mixing Paths ...

Page 73: ...red by CT1745 we recommend that the new volume control registers be used in place of these Register 0x04 Voice volume L R Register 0x22 Master volume L R Register 0x26 MIDI volume L R 4 bits per channel giving 16 levels 0 to 15 60 dB to 0 dB in 4 dB steps Default is 12 12 dB Register 0x28 CD volume L R Register 0x2E Line volume L R 4 bits per channel giving 16 levels 0 to 15 60 dB to 0 dB in 4 dB ...

Page 74: ...3D Input Mixer L switches Set the appropriate bit to 1 to close the switch 0 to open The default is MIDI L MIDI R Line L Line R CD L CD R Mic 0 0 1 0 1 0 1 Register 0x3E Input Mixer R switches Set the appropriate bit to 1 to close the switch 0 to open The default is MIDI L MIDI R Line L Line R CD L CD R Mic 0 0 0 1 0 1 1 When recording in mono note that samples will only be taken from the left inp...

Page 75: ...l giving 4 levels 0 to 3 0 dB to 18 dB in 6 dB steps Default is 0 0 dB Register 0x43 0 Mic AGC 0 AGC on default 1 Fixed gain of 20 dB Registers 0x44 0x45 Treble L R Registers 0x46 0x47 Bass L R 4 bits per channel giving 16 levels 0 to 7 14 dB to 0 dB in 2 dB steps 8 to 15 0 dB to 14 dB in 2 dB steps Default is 8 0 dB ...

Page 76: ...tter to use the MPU 401 mode on Sound Blaster 16 because it has its own independent I O ports and interrupt status bit which means that it is possible to have digitized sound and MIDI I O running together On the other hand SB MIDI mode shares the same I O ports and interrupt status bit associated with digitized sound The following discussions assume that you have knowledge of DSP programming and i...

Page 77: ...ation whenever there is any in bound MIDI data This eliminates the time needed to keep polling for the in bound MIDI data under polling mode MIDI time stamp mode which conforms to Microsoft Multimedia Extension Level 1 Specifications is also available on DSP version 2 00 and above Under MIDI time stamp mode in bound MIDI data is tagged with a time stamp which can be used by a MIDI sequencer to rep...

Page 78: ...e sent out call WriteDSP Send MIDI data Repeat the process to send out more MIDI data UART mode In order to send MIDI data in UART mode DSP commands 34h 35h 36h or 37h must first be sent to the DSP to switch the interface into UART mode Once in UART mode a read from the DSP reads MIDI data and a write to the DSP sends MIDI data To terminate UART mode send a DSP reset command The reset command beha...

Page 79: ... routine or an interrupt service routine mov dx wSBCBaseAddx SBC base I O address 2x0h add dl 0Eh Read Buffer Status port 2xEh Busy in al dx Read Read Buffer Status port or al al Data available jns Busy Bit 7 clear try again sub dl 4 Read Data port 2xAh in al dx Read in bound DSP data The in bound MIDI data is not tagged with timing information unless the MIDI time stamp mode is used Therefore it ...

Page 80: ...0h and 330h with a factory default of 330h Two consecutive I O addresses counting up from the base address are used to access the MPU 401 MIDI interface The two addresses are 300h and 301h or 330h and 331h The two I O addresses can be classified as Status port 3x1h read only This port indicates whether the interface is ready to accept a data command byte or has in bound data available for reading ...

Page 81: ...s busy Otherwise the command byte or MIDI data can be sent Example code mov dx wMpuBaseAddx MPU 401 base I O address inc dx Status port Busy in al dx Read status port test al 40h Ready for output jnz Busy Send command or MIDI data here Bit 7 the Input Ready bit indicates whether data is available for reading If it is 1 no data is available Otherwise there is data to be read Example code mov dx wMp...

Page 82: ...he Status port must be polled Example code mov dx wMpuBaseAddx MPU 401 base I O address inc dx Status port Busy in al dx Read status port test al 40h Ready for output jnz Busy mov al bCommand Get command out dx al Output command via Command port As only the UART mode is supported only two commands are recognized These two commands are Reset and Enter UART mode ...

Page 83: ...is fails either the MPU 401 is not installed or it does not exist at that I O address Example code mov dx wMpuBaseAddx MPU 401 base I O address inc dx Status port Busy in al dx Read status port test al 40h Ready for output jnz Busy No mov al 0FFh Output Reset command out dx al via Command port sub cx cx Maximum of 65536 tries Empty in al dx Read status port test al 80h Input data ready jnz NextLoo...

Page 84: ...or output jnz Busy No mov al 3Fh Output Enter UART mode out dx al command via Command port sub cx cx Maximum of 65536 tries Empty in al dx Read status port test al 80h Input data ready jnz NextLoop No dec dx Data port in al dx Read data cmp al 0FEh Successful mode switch je InUartMode SUCCESS inc dx Status port NextLoop loop Empty Try again Failed to switch to UART mode An interrupt is generated w...

Page 85: ...ilable when bit 7 of the Status port is zero Conversely when bit 7 is a one no MIDI data is available In interrupt mode an interrupt occurs when a MIDI code is ready An interrupt service routine has to be set up to retrieve the MIDI code Reading from the Data port will clear the interrupt signal The sequence for reading MIDI data is identical in both polling and interrupt modes Below is a code fra...

Page 86: ...itialize mode were introduced with DSP version 2 00 and high speed mode with version 2 01 Stereo digitized sound I O was made available with version 3 xx 16 bit digitized sound I O made its appearance with version 4 xx In the following discussions a summary of the DSP command set categorized according to functionality will be presented followed by detailed descriptions of each command in ascending...

Page 87: ... digitized sound I O 24h Input 74h 8 bit to 4 bit ADPCM output 75h 8 bit to 4 bit ADPCM output with ref byte 76h 8 bit to 3 bit ADPCM output 77h 8 bit to 3 bit ADPCM output with ref byte 16h 8 bit to 2 bit ADPCM output 17h 8 bit to 2 bit ADPCM output with ref byte 8 bit DMA mode digitized sound D0h Pause DMA mode I O control D4h Continue DMA mode Digitized sound output speaker D1h Turn on speaker ...

Page 88: ...t 8 bit auto init DMA mode Block transfer size 48h Set block transfer size UART mode MIDI I O 34h Polling mode 35h Interrupt mode 36h Polling with time stamping 37h Interrupt with time stamping Digitized sound output speaker control D8h Get speaker status The commands below are available on DSP versions 2 01 and 3 xx Category Cmd Description High speed mode digitized 90h 8 bit auto init DMA mode o...

Page 89: ...able on DSP version 4 xx Category Cmd Description Digitized sound I O 41h Set output sampling rate sampling rate 42h Set input sampling rate 8 bit DMA mode digitized sound I O Cxh Program 8 bit DMA mode sound I O 16 bit DMA mode digitized Bxh Program 16 bit DMA mode sound I O sound I O D5h Pause 16 bit DMA mode sound I O D6h Continue 16 bit DMA mode sound I O D9h Exit 16 bit auto init DMA mode sou...

Page 90: ...ed in the following format Command purpose of the command Output The command byte follows by parameter s to output in byte Remarks Detailed description of the command and its usage See Also Related commands if any Available Availability of the command on different versions of the DSP ...

Page 91: ...d 2 until all digitized sound data has been sent See Also command 20h 8 bit direct mode single byte digitized sound input Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 9 14h 8 bit single cycle DMA mode digitized sound output Output 14h wLength LowByte wLength HighByte Remarks Output unsigned digitized sound data using Single cycle DMA mode wLength is a word giving the number of 8 bit samples less 1 S...

Page 92: ...t to 2 bit ADPCM single cycle DMA mode digitized sound output with reference byte Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 9 17h Creative 8 bit to 2 bit ADPCM single cycle DMA mode digitized sound output with reference byte Output 17h wLength LowByte wLength HighByte Remarks Output first block of digitized sound data compressed with Creative 8 bit to 2 bit ADPCM using single cycle DMA mode wLeng...

Page 93: ...d I O The DSP will at the end of the current block transfer exit auto init mode and process the new DMA mode I O command 2 Send out the exit auto init DMA mode digitized sound I O command The DSP will at the end of the current block transfer exit auto init mode and terminate digitized sound I O See Also command 2Ch 8 bit auto init DMA mode digitized sound input command D0h Pause 8 bit DMA mode dig...

Page 94: ...d 16h Creative 8 bit to 2 bit ADPCM single cycle DMA mode digitized sound output command DAh Exit 8 bit auto init DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 20h 8 bit direct mode single byte digitized sound input Output 20h Remarks Input one byte of unsigned digitized sound data from the DSP The application is responsible for controlling the sampling rate The proper tr...

Page 95: ...14h 8 bit single cycle DMA mode digitized sound output Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 9 2Ch 8 bit auto init DMA mode digitized sound input Output 2Ch Remarks Input unsigned digitized sound data using auto init DMA mode Refer to command 1Ch on how to terminate an auto init transfer See Also command 1Ch 8 bit auto init DMA mode digitized sound output command DAh Exit 8 bit auto init DMA ...

Page 96: ...e MIDI I O Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 9 31h Interrupt mode MIDI input Output 31h Remarks Input MIDI data from the MIDI port using interrupt mode After sending this command DSP will generate an interrupt to signal the application when there is any in bound MIDI data To terminate this mode send the command 31h again See Also command 30h Polling mode MIDI input command 35h UART interr...

Page 97: ...s prior to entering MIDI UART mode See Also command 30h Polling mode MIDI input command 36h UART polling mode MIDI I O with time stamping Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 35h UART interrupt mode MIDI I O Output 35h Remarks After sending this command the DSP will generate an interrupt to signal the application when there is any in bound MIDI data Refer to command 34h on the characteristic...

Page 98: ...terminate it See Also command 37h Interrupt mode MIDI I O with time stamping Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 37h UART interrupt mode MIDI I O with time stamping Output 37h Remarks After sending this command the DSP will generate an interrupt to signal the application when there is any in bound MIDI data In bound MIDI data is time stamped by the DSP Refer to command 34h on the characteri...

Page 99: ...onstant Output 40h bTimeConstant Remarks Set the digitized sound I O transfer Time Constant Time Constant is the sampling rate representation used by the DSP It is calculated as Time Constant 65536 256 000 000 channels sampling rate The channels parameter is 1 for mono 2 for stereo Only the high byte of the result is sent to the DSP See Also command 41h Set digitized sound output sampling rate com...

Page 100: ...ate by two before programming the sampling rate for stereo digitized sound I O See Also command 40h Set digitized sound transfer Time Constant command 42h Set digitized sound input sampling rate Available 1 xx 2 00 2 01 3 xx 4 xx 9 42h Set digitized sound input sampling rate Output 42h wSamplingRate HighByte wSamplingRate LowByte Remarks Refer to command 41h See Also command 40h Set digitized soun...

Page 101: ...init DMA mode See Also Commands that initiate high speed mode digitized sound I O Commands that initiate auto init DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 74h Creative 8 bit to 4 bit ADPCM single cycle DMA mode digitized sound output Output 74h wLength LowByte wLength HighByte Remarks Refer to command 16h See Also command 75h Creative 8 bit to 4 bit ADPCM single cyc...

Page 102: ... bit to 4 bit ADPCM single cycle DMA mode digitized sound output Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 9 76h Creative 8 bit to 3 bit ADPCM single cycle DMA mode digitized sound output Output 76h wLength LowByte wLength HighByte Remarks Refer to command 16h See Also command 77h Creative 8 bit to 3 bit ADPCM single cycle DMA mode digitized sound output with reference byte Available 1 xx 2 00 2 ...

Page 103: ...t ADPCM single cycle DMA mode digitized sound output Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 9 7Dh Creative 8 bit to 4 bit ADPCM auto init DMA mode digitized sound output with reference byte Output 7Dh Remarks Refer to command 1Fh See Also command 74h Creative 8 bit to 4 bit ADPCM single cycle DMA mode digitized sound output command DAh Exit 8 bit auto init DMA mode digitized sound I O Availabl...

Page 104: ...ommand DAh Exit 8 bit auto init DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 80h Pause DAC for a duration Output 80h wDuration LowByte wDuration HighByte Remarks wDuration is a word giving the duration to pause in the units of sampling period less 1 When the specified duration elapses the DSP generates an interrupt See Also command 40h Set digitized sound transfer Time C...

Page 105: ...ters to the states prior to entering the high speed mode See Also command 91h 8 bit high speed single cycle DMA mode digitized sound output command 98h 8 bit high speed auto init DMA mode digitized sound input Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 91h 8 bit high speed single cycle DMA mode digitized sound input Output 91h Remarks After transferring a block of data of size set by command 48h the D...

Page 106: ...mand 99h 8 bit high speed single cycle DMA mode digitized sound input Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 99h 8 bit high speed single cycle DMA mode digitized sound input Output 99h Remarks Refer to command 91h See Also command 91h 8 bit high speed single cycle DMA mode digitized sound output command 98h 8 bit high speed auto init DMA mode digitized sound input Available 1 xx 2 00 2 01 3 xx 4 x...

Page 107: ...xx 9 A8h Set input mode to stereo Output A8h Remarks This command must be sent if stereo recording is desired After recording command A0h must be sent to set the input mode back to mono This command no longer exists on DSP version 4 xx Refer to commands Bxh and Cxh on stereo recording settings See Also command A0h Set input mode to mono Available 1 xx 2 00 2 01 3 xx 4 xx 9 ...

Page 108: ...commands The bMode byte is organized as D7 D6 D5 D4 D3 D2 D1 D0 0 0 stereo signed 0 0 0 0 0 mono 0 unsigned 1 stereo 1 signed where the signed bit determines whether the data is signed or unsigned For minimum signal amplitude the signed 16 bit value is 0000h with unsigned data the equivalent value is 8000h wLength is a word giving the number of 16 bit samples less 1 Refer to command 1Ch on how to ...

Page 109: ...g the number of 8 bit samples less 1 See Also command Bxh Program 16 bit DMA mode digitized sound I O on common details command D0h Pause 8 bit DMA mode digitized sound I O command D4h Continue 8 bit DMA mode digitized sound I O command DAh Exit 8 bit auto init DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 xx 9 D0h Pause 8 bit DMA mode digitized sound I O Output D0h Remarks After re...

Page 110: ... command Some important notes 1 On version 1 xx the DSP will pause the DMA transfer after executing this command 2 On DSP version 4 xx this command has no practical effect on the output signal However it will still set to On the DSP s internal speaker On Off flag so that command D8h Get speaker status will return the correct status See Also command D3h Turn off speaker command D8h Get speaker stat...

Page 111: ...ff the DSP s internal speaker On Off flag so that command D8h Get speaker status will return the correct status See Also command D1h Turn on speaker command D8h Get speaker status Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 9 D4h Continue 8 bit DMA mode digitized sound I O Output D4h Remarks Resumes the DMA transfer paused by command D0h Pause 8 bit DMA mode digitized sound I O Applicable to both s...

Page 112: ...Program 16 bit DMA mode digitized sound I O command D6h Continue 16 bit DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 xx 9 D6h Continue 16 bit DMA mode digitized sound I O Output D6h Remarks This acts on I O initiated by command Bxh Applicable to both single cycle and auto init DMA modes See Also command D5h Pause 16 bit DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 x...

Page 113: ...00h that it s off See Also command D1h Turn on speaker command D3h Turn off speaker Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 D9h Exit 16 bit auto init DMA mode digitized sound I O Output D9h Remarks Exits at the end of the current 16 bit auto init DMA block transfer and terminates the I O process See Also command Bxh Program 16 bit DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 xx ...

Page 114: ... Program 8 bit DMA mode digitized sound I O commands that initiate 8 bit auto init DMA mode digitized sound I O Available 1 xx 2 00 2 01 3 xx 4 xx 9 9 9 9 E1h Get DSP version number Output E1h Remarks After sending this command read back two bytes from the DSP The first byte is the major version number and the second byte is the minor version number See Also None Available 1 xx 2 00 2 01 3 xx 4 xx...

Page 115: ...id conflicts with other add on cards The factory default base I O address setting for all Sound Blaster cards is 220 Hex In the following discussion x is used to denote the selected base I O address The joystick port on Sound Blaster cards is identical to the standard PC Game Control Adapter or game I O port Thus it uses I O addresses from 200h to 207h ...

Page 116: ...ort Write Only Base 1h C MS Music Voice 1 6 Register Port Write Only Base 2h C MS Music Voice 7 12 Data Port Write Only Base 3h C MS Music Voice 7 12 Register Port Write Only Base 6h DSP Reset Write Only Base 8h FM Music Status Port Read Base 8h FM Music Register Port Write Base 9h FM Music Data Port Write Only Base Ah DSP Read Data Port Read Only Base Ch DSP Write Command Data Write Base Ch DSP W...

Page 117: ...3 SBMCV I O Ports The following table lists the functions of the I O ports I O Address Description Access Base 6h DSP Reset Write Only Base 8h FM Music Status Port Read Base 8h FM Music Register Port Write Base 9h FM Music Data Port Write Only Base Ah DSP Read Data Port Read Only Base Ch DSP Write Command Data Write Base Ch DSP Write Buffer Status Bit 7 Read Base Eh DSP Read Buffer Status Bit 7 Re...

Page 118: ...egister Port Write Only Base 2h C MS Music Voice 7 12 Data Port Write Only Base 3h C MS Music Voice 7 12 Register Port Write Only Base 6h DSP Reset Write Only Base 8h FM Music Status Port Read Base 8h FM Music Register Port Write Base 9h FM Music Data Port Write Only Base Ah DSP Read Data Port Read Only Base Ch DSP Write Command Data Write Base Ch DSP Write Buffer Status Bit 7 Read Base Eh DSP Rea...

Page 119: ...5h Table A 7 SB2CD I O Ports The following table lists the functions of the I O ports I O Address Description Access Base 0h CD ROM Command or Data Register Read Write Base 1h CD ROM Status Register Read Only Base 2h CD ROM Reset Register Write Only Base 3h CD ROM Enable Register Write Only Base 4h Mixer chip Register Address Port Write Only Base 5h Mixer chip Data Port Read Write Table A 8 SB2CD ...

Page 120: ...Register Address Port Write Base 1h Left FM Music Data Port Write Only Base 2h Right FM Music Status Port Read Base 2h Right FM Music Register Address Port Write Base 3h Right FM Music Data Port Write Only Base 4h Mixer chip Register Address Port Write Only Base 5h Mixer chip Data Port Read Write Base 6h DSP Reset Write Only Base 8h FM Music Status Port Read Base 8h FM Music Register Port Write Ba...

Page 121: ...h Mixer chip Data Port Read Write Base 6h DSP Reset Write Only Base 8h FM Music Status Port Read Base 8h FM Music Register Port Write Base 9h FM Music Data Port Write Only Base Ah DSP Read Data Port Read Only Base Ch DSP Write Command Data Write Base Ch DSP Write Buffer Status Bit 7 Read Base Eh DSP Read Buffer Status Bit 7 Read Only Base 10h CD ROM Command or Data Register Read Write Base 11h CD ...

Page 122: ...anced FM Music Register Address Port Write Base 3h Advanced FM Music Data Port Write Only Base 4h Mixer chip Register Address Port Write Only Base 5h Mixer chip Data Port Read Write Base 6h DSP Reset Write Only Base 8h FM Music Status Port Read Base 8h FM Music Register Port Write Base 9h FM Music Data Port Write Only Base Ah DSP Read Data Port Read Only Base Ch DSP Write Command Data Write Base C...

Page 123: ...c Register Address Port Write Base 3h Advanced FM Music Data Port Write Only Base 4h Mixer chip Register Address Port Write Only Base 5h Mixer chip Data Port Read Write Base 6h DSP Reset Write Only Base 8h FM Music Status Port Read Base 8h FM Music Register Port Write Base 9h FM Music Data Port Write Only Base Ah DSP Read Data Port Read Only Base Ch DSP Write Command Data Write Base Ch DSP Write B...

Page 124: ...able for either 300h or 330h The factory default is 330h Base Address I O Addresses Used 300h 300h to 301h 330h 330h to 331h Table A 16 MPU 401 I O Ports The following table lists the functions of the I O ports I O Address Description Access Base 0h Data Port Read Write Base 1h Status Port Read Base 1h Command Port Write Table A 17 MPU 401 I O Port Functions ...

Page 125: ... with Microsoft The Creative Voice File allows you to embed ASCIIZ text and or marker include information on compression techniques loop on a portion of the VOC file use digitized sound data with multiple sampling rates within a file The Creative ADPCM wave type is used in the Multimedia Wave File to support the Creative ADPCM compression technique ...

Page 126: ...orm digitized sound output Header Block Offset Hex Description 00H 13H File type description The following message is stored here Creative Voice File 1AH 14H 15H Offset of the Data Block from the start of VOC file This word points to the Data Block It helps the application programs to locate the Data Block in case the size of Header Block is changed For this version the value here is 1A Hex 16H 17...

Page 127: ...he third byte is the highest byte of the length field respectively All sub blocks have the Block Type field followed immediately by the block length field except the Terminator sub block Your program need not interpret all the Block Types If unknown Block Type is encountered it should ignored and advance to the next sub block by using the Block Length The high level digitized sound drivers handle ...

Page 128: ...s is a 1 byte field which indicates the Time Constant of the digitized sound data of this block The Time Constant is defined as follows Time Constant 65536 256 000 000 channels sampling rate The channels parameter is 1 for mono and 2 for stereo Only the high byte of the result is stored here For instance for a 10000Hz mono digitized sound the Time Constant is set to 9C hex using the following calc...

Page 129: ...YTE nBlockLen 3 3 byte block length The header is followed immediately by the digitized sound data Here is a discussion of various fields bBlockID The Block Type identifier is 2 nBlockLen Length of the block in bytes excluding the bBlockID and nBlockLen fields This block type will only be used when the digitized sound data size exceeds the 3 byte block length 16 megabytes Block Type 3 This block s...

Page 130: ... calculation is the same as described in Block Type 1 Block Type 4 This is a special block that specifies a Marker in the digitized sound data The Block Header is organized as follows BYTE bBlockID 4 BYTE nBlockLen 3 3 byte block length WORD wMarker marker value Here is a discussion of various fields bBlockID The Block Type identifier is 4 nBlockLen Length of the block in bytes excluding the bBloc...

Page 131: ...ier is 5 nBlockLen Length of the block in bytes excluding the bBlockID and nBlockLen fields The value is the length of the null terminated ASCII string null inclusive szString This is variable length field which specifies a null terminated ASCII string The length of this field is the string length null inclusive This field is for a program that requires ASCII information on the VOC file such as na...

Page 132: ... can be any value between 1 to 0FFFE hex inclusive If this value is set to 0FFFF hex an endless loop occurs Block Type 7 This block indicates the end of a repeat loop It works in conjunction with Block Type 6 The Block Header is organized as follows BYTE bBlockID 7 BYTE nBlockLen 3 3 byte block length Here is a discussion of various fields bBlockID The Block Type identifier is 7 nBlockLen Length o...

Page 133: ...ader is followed immediately by Block Type 1 Here is a discussion of various fields bBlockID The Block Type identifier is 8 nBlockLen Length of the block in bytes excluding the bBlockID and nBlockLen fields The value is 4 wTimeConstant This is a 2 byte field which indicates the Time Constant of the digitized sound data in the Block Type 1 The calculation of the Time Constant is the same as describ...

Page 134: ...ck the digitized sound attributes carried by the following Block Type 1 is ignored Block Type 9 This is a digitized sound data block that supersedes Block Types 1 and 8 The Block Header is organized as follows BYTE bBlockID 9 BYTE nBlockLen 3 3 byte block length DWORD dwSamplesPerSec BYTE bBitsPerSample BYTE bChannels WORD wFormat BYTE reserved 4 pad with zero The header is followed immediately by...

Page 135: ...ny bChannels This is 1 for mono or 2 for stereo wFormat The currently supported formats are Value Meaning 0x0000 8 bit unsigned PCM 0x0001 Creative 8 bit to 4 bit ADPCM 0x0002 Creative 8 bit to 3 bit ADPCM 0x0003 Creative 8 bit to 2 bit ADPCM 0x0004 16 bit signed PCM 0x0006 CCITT a Law 0x0007 CCITT µ Law 0x0200 Creative 16 bit to 4 bit ADPCM Some other points to note 1 This is a new Block Type int...

Page 136: ...s Number of channels 1 for mono 2 for stereo nSamplesPerSec Sampling frequency of the data Should be restricted to 8000 11025 22050 and 44100 Hz nAvgBytesPerSec Average data rate nBlockAlign Block alignment 1 for both mono and stereo data wBitsPerSample Number of bits per sample The value is 4 cbExtraSize Number of bytes of extra information in the extended WAVE fmt header The value is 2 wRevision...

Page 137: ...errupt Controller PIC or Direct Memory Access DMA Controller you may refer to the following sources Digital Audio For more information on digital audio see the following books Principles of Digital Audio Ken C Pohlmann Howard W Sams Company Digital Audio Engineering An Anthology Strawn John F William Kaufmann Inc ...

Page 138: ...mmable DMA Controller Data Sheet Interfacing to the IBM Personal Computer Lewis C Eggebrecht Howard W Sams Company ISA System Architecture Shanley Anderson PC System Architecture Series Volume 1 MindShare Press Joystick Port Programming The joystick port on Sound Blaster cards is identical to the standard PC Game Control Adapter thus for more information on the joystick port programming see the IB...

Page 139: ...res 4 4 register functions 4 4 register map 4 4 CT1345 features 4 6 Register functions 4 7 register map 4 7 CT1745 features 4 10 input mixing paths 4 14 output mixing paths 4 13 register functions 4 11 register map 4 12 D______________________________ Digitized sound data format 16 bit mono PCM order 3 3 16 bit stereo PCM order 3 3 8 bit mono PCM order 3 3 8 bit stereo PCM order 3 3 Digitized soun...

Page 140: ...DI data 5 10 resetting 5 8 sending command 5 7 sending MIDI data 5 10 O______________________________ Output mixing paths schematic 4 13 P______________________________ Pulse Code Modulation 3 2 R______________________________ Reading MIDI data 5 4 5 10 Reference byte 3 7 3 13 3 14 Register functions CT1335 4 4 CT1345 4 7 CT1745 4 11 S______________________________ Sample size 3 2 Sampling ranges ...

Page 141: ...Index3 ...

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