Congatec COM Express conga-TCA5 User Manual Download Page 48 | Manualshive

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Table 14 PCI Express Signal Descriptions (general purpose)

Signal

Pin #

Description

I/O

PU/PD

Comment

P

PCIE_RX0-

B68

B69

PCI Express channel 0, Receive Input differential pair.

I PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_TX0-

A68

A69

PCI Express channel 0, Transmit Output differential pair.

O PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_RX1-

B64

B65

PCI Express channel 1, Receive Input differential pair.

I PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_TX1-

A64

A65

PCI Express channel 1, Transmit Output differential pair.

O PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_RX2-

B61

B62

PCI Express channel 2, Receive Input differential pair.

I PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_TX2-

A61

A62

PCI Express channel 2, Transmit Output differential pair.

O PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_RX3-

B58

B59

PCI Express channel 3, Receive Input differential pair.

I PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_TX3-

A58

A59

PCI Express channel 3, Transmit Output differential pair.

O PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_RX4-

B55

B56

PCI Express channel 4, Receive Input differential pair.

I PCIE

Supports PCI Express Base Specification, Revision 2.0

P

PCIE_TX4-

A55

A56

PCI Express channel 4, Transmit Output differential pair.

O PCIE

Supports PCI Express Base Specification, Revision 2.0.

P

PCIE_RX5-

B52

B53

PCI Express channel 5, Receive Input differential pair.

I PCIE

Not supported

P

PCIE_TX5-

A52

A53

PCI Express channel 5, Transmit Output differential pair.

O PCIE

Not supported

P

PCIE_RX6-

C19

C20

PCI Express channel 6, Receive Input differential pair.

I PCIE

Not supported.

P

PCIE_TX6-

D19

D20

PCI Express channel 6, Transmit Output differential pair.

O PCIE

Not supported.

P

PCIE_RX7-

C22

C23

PCI Express channel 7, Receive Input differential pair.

I PCIE

Not supported.

P

PCIE_TX7-

D22

D23

PCI Express channel 7, Transmit Output differential pair.

O PCIE

Not supported.

PCIE_

PCIE_CLK_REF-

A88

A89

PCI Express Reference Clock output for all PCI Express

and PCI Express Graphics Lanes.

O PCIE

A PCI Express compliant clock buffer chip must be

used on the carrier board if more than one PCI Express

device is designed in.

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Summary of Contents for COM Express conga-TCA5

Page 1: ...COM Express conga TCA5 COM Express Type 6 Compact module based on the Intel Atom Pentium and Celeron Apollo Lake SoC User s Guide Revision 1 9...

Page 2: ...ng Solutions and added table 7 Cooling Solution Variants Changed the recommended maximum torque specification for all cooling screws in section 4 Cooling Solutions Updated the supported Winbond flash...

Page 3: ...congatec GmbH Updated the note in section 5 1 2 3 VGA Re arranged section 6 Additional Features Updated section 6 5 congatec Battery Management Interface 1 9 2021 11 16 AEM Deleted HDMI references fro...

Page 4: ...r similar licenses You can find the specific details at https www congatec com en licenses Search for the revision of the BIOS UEFI or Board Controller Software as shown in the POST screen or BIOS set...

Page 5: ...cally qualified personnel It is not intended for general audiences Lead Free Designs RoHS All congatec GmbH designs are created from lead free components and are completely RoHS compliant Electrostati...

Page 6: ...loss of data Note Notes call attention to important information that should be observed Trademarks Product names logos brands and other trademarks featured or referred to within this user s guide or t...

Page 7: ...air warranty period in effect as of the date the repaired exchanged or replaced product is shipped by congatec or the remainder of the original warranty whichever is longer This Limited Warranty exten...

Page 8: ...cond kHz Kilohertz MHz Megahertz TDP Thermal Design Power PCIe PCI Express SATA Serial ATA DDC Display Data Channel SoC System On Chip LVDS Low Voltage Differential Signaling Gbe Gigabit Ethernet eMMC...

Page 9: ...Interface 30 5 1 7 UART 30 5 1 8 ExpressCard 31 5 1 9 SD Card 31 5 1 10 GPIOs 31 5 1 11 LPC Bus 31 5 1 12 I C Bus 31 5 1 13 SPI 31 5 1 14 Power Control 32 5 1 15 Power Management 33 6 Additional Feat...

Page 10: ...ess Assignment 65 9 1 1 LPC Bus 65 9 2 PCI Configuration Space Map 66 9 3 I C Bus 67 9 4 SM Bus 67 9 5 congatec System Sensors 68 10 BIOS Setup Description 69 10 1 Navigating the BIOS Setup Menu 69 10...

Page 11: ...Table 18 DisplayPort DP Signal Descriptions 54 Table 19 CRT Signal Descriptions 55 Table 20 LVDS Signal Descriptions 56 Table 21 Serial ATA Signal Descriptions 56 Table 22 USB 2 0 Signal Descriptions...

Page 12: ...Type 6 pinout definition and comply with COM Express 2 1 specification They are equipped with two high performance connectors that ensure stable data throughput The COM computer on module integrates...

Page 13: ...three industrial The table below shows the different configurations available Table 2 Commercial Variants Part No 048530 048531 Processor Intel Celeron N3350 Dual Core 1 1 GHz Intel Pentium N4200 Quad...

Page 14: ...GHz 1 8 GHz Graphics Intel HD Graphics 505 Intel HD Graphics 500 Intel HD Graphics 500 GFX Base Burst 500 MHz 650 Mhz 400 MHz 600 MHz 400 MHz 550 MHz Memory DDR3L 1866 MT s dual channel 1866 MT s dual...

Page 15: ...ing transcode Up to 3 independent displays must be two DP DP HDMI DVI and one eDP LVDS 2x DP 1x LVDS 1x Optional eDP 1 3 1x Optional VGA Resolutions up to 4K NOTE 1 Variants that feature optional eDP...

Page 16: ...nimum storage capacity of 20 GB We will not offer installation support for systems with less than 20 GB storage space 2 3 Mechanical Dimensions 95 0 mm x 95 0 mm 3 75 x 3 75 Height approximately 18 or...

Page 17: ...ts Input Range Volts Derated Input Volts Max Input Ripple 10Hz to 20MHz mV Max Module Input Power w derated input Watts Assumed Conversion Efficiency Max Load Power Watts VCC_12V 12 12 11 4 12 6 11 4...

Page 18: ...Minimum value Lowest frequency mode LFM with minimum core voltage during desktop idle S0 Maximum value Highest frequency mode HFM Turbo Boost The CPU was stressed to its maximum frequency S0 Peak val...

Page 19: ...7 Windows 10 Intel Pentium N4200 4 1 1 2 5 0 12 1 04 1 85 0 11 0 10 Note With fast input voltage rise time the inrush current may exceed the measured peak current 2 6 Supply Voltage Battery Power Tabl...

Page 20: ...ial variants Operation 40 to 85 C Storage 40 to 85 C Humidity Operation 10 to 90 Storage 5 to 95 Caution The above operating temperatures must be strictly adhered to at all times When using a congatec...

Page 21: ...re connector 1 eMMC flash 1 MIPI CSI SuperSpeed 0 SuperSpeed 1 SuperSpeed 2 SuperSpeed 3 PCIe0 x1 PCIe1 x1 PCIe2 x1 PCIe3 x1 8x USB 2 0 HDA SATA0 SATA1 SM Bus SPI UART UART SD Card GPIOs I2C LID SLEEP...

Page 22: ...die Intel Pentium and Celeron CPU variants Note 1 We recommend a maximum torque of 0 4 Nm for carrier board mounting screws and 0 5 Nm for module mounting screws 2 The gap pad material used on congat...

Page 23: ...post feature the thermal stacks may move 4 Do not exceed the recommended maximum torque Doing so may damage the module or the carrier board or both 4 1 CSP Dimensions For Bare die Variants 76 15 87 8...

Page 24: ...24 70 For Lidded Variants 76 15 87 87 21 40 41 4 18 4 22 29 95 95 M2 5 x 8 mm threaded standoff for threaded version or 2 7 x 10 mm non threaded standoff for borehole version 40 5 E 3 1 0 1 3 4 0 5 6...

Page 25: ...HSP Dimensions For Bare die Variants 95 95 4 11 40 5 C 4 5 0 1 60 R 0 5 2 x R 1 4 x 7 9 4 0 5 28 15 C 0 8 0 8 76 15 87 87 21 40 41 4 18 4 M2 5 x 11 mm threaded standoff for threaded version or 2 7 x 1...

Page 26: ...26 70 For Lidded Variants 95 95 4 11 40 5 C 3 1 0 1 60 R 0 5 2 x R 1 4 x 0 5 4 7 9 28 15 C 0 8 0 8 76 15 87 87 21 40 41 4 18 4 M2 5 x 11 mm threaded standoff for threaded version or 2 7 x 11 mm non th...

Page 27: ...rows 5 1 1 PCI Express The conga TCA5 offers three PCI Express lanes on the A B connector The lanes support up to 5 GT s Gen 2 speed a 3 x1 link configuration an optional 1 x2 1 x1 link configuration...

Page 28: ...pports the following up to two DP ports VESA DisplayPort Standard 1 2 up to 4096x2160 at 60 Hz maximum of two independent DP displays 5 1 2 2 LVDS The conga TCA5 offers an LVDS interface with optional...

Page 29: ...peed differential signals on the C D connector The xHCI host controller supports the following USB 3 0 Specification SuperSpeed High Speed Full Speed and Low Speed USB signaling data transfers of up t...

Page 30: ...tion It is only active during a 100 Mb or 1 Gb connection This is a limitation of Ethernet Phy since it only has 3 LED outputs ACT LINK100 and LINK1000 2 The GBE0_LINK signal is a logic AND of the GBE...

Page 31: ...lel data lines 5 1 10 GPIOs The conga TCA5 offers General Purpose Input Output signals on the A B connector 5 1 11 LPC Bus The conga TCA5 offers the LPC Low Pin Count bus on the A B connector For info...

Page 32: ...board hardware must drive this signal low until all power rails and clocks are stable Releasing PWR_OK too early or not driving it low at all can cause numerous boot up problems It is a good design p...

Page 33: ...is the sole operational power source for the conga TCA5 The remaining necessary voltages are generated internally on the module using onboard voltage regulators A carrier board designer should be awa...

Page 34: ...of the congatec BIOS features It fully isolates some of the embedded features such as system monitoring or the I C bus from the x86 core architecture which results in higher embedded feature performa...

Page 35: ...UT FAN_TACHIN implementation see the COM Express Design Guide 6 3 3 Power Loss Control The cBC has full control of the power up of the module and therefore can be used to specify the behavior of the s...

Page 36: ...y themselves using the congatec system utility CGUTIL See congatec application note AN8_Create_OEM_Default_Map pdf on the congatec website for details on how to add OEM default settings to the congate...

Page 37: ...OEM DXE driver 6 5 congatec Battery Management Interface To facilitate the development of battery powered mobile systems based on embedded modules congatec GmbH defined an interface for the exchange o...

Page 38: ...tware that runs unmodified on all congatec CPU modules All the hardware related code is contained within the congatec embedded BIOS on the module See section 1 1 of the CGOS API software developers gu...

Page 39: ...Uses Power Aware Interrupt Routing Uses 14 nm process technology Note Intel Hyper Threading technology is not supported four cores execute four threads 7 1 1 1 Intel Virtualization Technology Intel V...

Page 40: ...sive cooling trip point setup node in the BIOS setup program to determine the temperature threshold that the operating system will use to start or stop the passive cooling procedure Critical Trip Poin...

Page 41: ...ally from S3 PME Activate the wake up capabilities of a PCI device using Windows Device Manager configuration options for this device OR set Resume On PME to Enabled in the Power setup menu USB Mouse...

Page 42: ...t 2 USB 3 0 USB 2 0 Port 1 Port 0 Port 4 Port 5 Port 6 Port 7 COM Express Connector Port 3 Port 2 xHCI USB 2 0 Port 1 USB 2 0 Port 0 Apollo Lake SoC OR OR OR OR USB 2 0 Port 3 USB 2 0 Port 7 USB 2 0 P...

Page 43: ...The Signal Description tables do not list internal pull ups or pull downs implemented by the chip vendors Only pull ups or pull downs implemented by congatec are listed For information about the inter...

Page 44: ...LPC_DRQ1 1 A64 PCIE_TX1 B64 PCIE_RX1 A10 GBE0_MDI1 B10 LPC_CLK A65 PCIE_TX1 B65 PCIE_RX1 A11 GND FIXED B11 GND FIXED A66 GND B66 WAKE0 A12 GBE0_MDI0 B12 PWRBTN A67 GPI2 B67 WAKE1 A13 GBE0_MDI0 B13 SM...

Page 45: ...4 B39 USB5 A94 SPI_CLK B94 VGA_VSYNC 2 A40 USB4 B40 USB5 A95 SPI_MOSI B95 VGA_I2C_CK 2 A41 GND FIXED B41 GND FIXED A96 TPM_PP B96 VGA_I2C_DAT 2 A42 USB2 B42 USB3 A97 TYPE10 1 B97 SPI_CS A43 USB2 B43 U...

Page 46: ...G_RX5 1 D69 PEG_TX5 1 C15 DDI1_PAIR6 1 D15 DDI1_CTRLCLK_AUX C70 GND FIXED D70 GND FIXED C16 DDI1_PAIR6 1 D16 DDI1_CTRLDATA_AUX C71 PEG_RX6 1 D71 PEG_TX6 1 C17 RSVD D17 RSVD C72 PEG_RX6 1 D72 PEG_TX6 1...

Page 47: ...GND C42 DDI3_PAIR1 1 D42 DDI2_PAIR1 C97 RVSD D97 RSVD C43 DDI3_PAIR1 1 D43 DDI2_PAIR1 C98 PEG_RX14 1 D98 PEG_TX14 1 C44 DDI3_HPD 1 D44 DDI2_HPD C99 PEG_RX14 1 D99 PEG_TX14 1 C45 RSVD D45 RSVD C100 GND...

Page 48: ...ation Revision 2 0 PCIE_TX3 PCIE_TX3 A58 A59 PCI Express channel 3 Transmit Output differential pair O PCIE Supports PCI Express Base Specification Revision 2 0 PCIE_RX4 PCIE_RX4 B55 B56 PCI Express c...

Page 49: ..._RX7 PEG_RX8 PEG_RX8 PEG_RX9 PEG_RX9 PEG_RX10 PEG_RX10 PEG_RX11 PEG_RX11 PEG_RX12 PEG_RX12 PEG_RX13 PEG_RX13 PEG_RX14 PEG_RX14 PEG_RX15 PEG_RX15 C52 C53 C55 C56 C58 C59 C61 C62 C65 C66 C68 C69 C71 C72...

Page 50: ...PEG_TX15 PEG_TX15 D52 D53 D55 D56 D58 D59 D61 D62 D65 D66 D68 D69 D71 D72 D74 D75 D78 D79 D81 D82 D85 D86 D88 D89 D91 D92 D94 D95 D98 D99 D101 D102 PCI Express Graphics Transmit Output differential pa...

Page 51: ...xed with DP1_HPD and HDMI1_HPD I 3 3V PD 100k DDI1_CTRLCLK_AUX D15 Multiplexed with SDVO1_CTRLCLK DP1_AUX and HDMI1_CTRLCLK DP AUX function if DDI1_DDC_AUX_SEL is no connect HDMI DVI I2C CTRLCLK if DD...

Page 52: ...ls I 3 3V PD 1M DDI3_PAIR0 DDI3_PAIR0 C39 C40 Multiplexed with DP3_LANE0 and TMDS3_DATA2 Multiplexed with DP3_LANE0 and TMDS3_DATA2 O PCIE Not connected DDI3_PAIR1 DDI3_PAIR1 C42 C43 Multiplexed with...

Page 53: ...I2_PAIR3 and DDI2_PAIR3 O PCIE TMDS2_DATA0 TMDS2_DATA0 D46 D47 TMDS differential pair Multiplexed with DDI2_PAIR2 and DDI2_PAIR2 O PCIE TMDS2_DATA1 TMDS2_DATA1 D42 D43 TMDS differential pair Multiplex...

Page 54: ...Uni directional main link for the transport of isochronous streams and secondary data Multiplexed with DDI1_PAIR0 and DDI1_PAIR0 O PCIE DP1_HPD C24 Detection of Hot Plug Unplug and notification of th...

Page 55: ...IR0 and DDI3_PAIR0 O PCIE DP3_HPD C44 Detection of Hot Plug Unplug and notification of the link layer Multiplexed with DDI3_HPD I 3 3V PD 100k DP3_AUX C36 Half duplex bi directional AUX channel for se...

Page 56: ...D 10k LVDS_BKLT_EN B79 LVDS panel backlight enable O 3 3V PD 10k LVDS_BKLT_CTRL B83 LVDS panel backlight brightness control O 3 3V PD 10k LVDS_I2C_CK A83 DDC lines used for flat panel detection and co...

Page 57: ...mpatible to USB 1 1 USB2 A43 USB Port 2 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB2 A42 USB Port 2 data or D I O USB 2 0 compliant Backwards compatible to USB 1 1 USB3 B43 USB...

Page 58: ...ine low I 3 3VSB PU 10k 3 3VSB Do not pull this line high on the carrier board Table 23 USB 3 0 Signal Descriptions Signal Pin Description I O PU PD Comment USB_SSRX0 C4 Additional receive signal diff...

Page 59: ...which the reference is shorted to ground the current shall be limited to 250mA or less Not connected GBE0_SDP Gigabit Ethernet Controller 0 Software definable Pin Can also be used for IEEE1588 support...

Page 60: ...rrupt I O 3 3V LPC_CLK B10 LPC clock output 25MHz nominal O 3 3V Table 28 SPI BIOS Flash Interface Signal Descriptions Signal Pin Description I O PU PD Comment SPI_CS B97 Chip select for Carrier Board...

Page 61: ...ose I O Signal Descriptions Signal Pin Description I O PU PD Comment GPO0 A93 General purpose output pins Shared with SD_CLK Output from COM Express input to SD O 3 3V GPO1 B54 General purpose output...

Page 62: ...s system is in Suspend to Disk state Active low output O 3 3VSB SUS_S5 A24 Indicates system is in Soft Off state O 3 3VSB Not supported by chipset Shorted with SUS_S4 WAKE0 B66 PCI Express wake up sig...

Page 63: ...d to GND TYPE2 TYPE1 TYPE0 X NC NC NC NC GND X NC NC GND GND NC X NC GND NC GND NC Pinout Type 1 Pinout Type 2 Pinout Type 3 no IDE Pinout Type 4 no PCI Pinout Type 5 no IDE no PCI Pinout Type 6 no ID...

Page 64: ...for standby and suspend functions May be left unconnected if these functions are not used in the system design P VCC_RTC A47 Real time clock circuit power input Nominally 3 0V P GND A1 A11 A21 A31 A4...

Page 65: ...o Motherboard resources 0CF8 0CFB 4 bytes No PCI configuration address register 0CFC 0CFF 4 bytes No PCI configuration data register 0D00 F000 See note PCI PCI Express bus Note The BIOS assigns PCI an...

Page 66: ...6 PCI Configuration Space Map Bus Number hex Device Number hex Function Number hex Device ID Description and Device ID 00h 00h 00h 0x5AF0 Host Bridge 00h 02h 00h 0x5A84 Graphics and Display 00h 0Dh 00...

Page 67: ...01Ch 01h 0x5ACC eMMC 00h 01Fh 00h 0x5AE8 LPC Bus 00h 01Fh 01h 0x5AD4 SM Bus 02h 00h 00h 0x1539 Intel PCIe Ethernet Network on Module Note 1 To view these ports attach a device to the corresponding PCI...

Page 68: ...sensors CPU temperature based on CPU Digital Thermal Sensor Board temperature sensor located on the Board Controller voltage sensors 5V standard voltage sensor 5V standby voltage sensor current sensor...

Page 69: ...com Note If you do not have access to the restricted area of the congatec website contact your local congatec sales representative 10 1 Navigating the BIOS Setup Menu The BIOS setup menu shows the fea...

Page 70: ...Note 1 Deprecated Caution The DOS command line tool is not officially supported by congatec and therefore not recommended for critical tasks such as firmware updates We recommend to use only the UEFI...

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