Comtech EF Data CDM-840, Installation And Operation Manual, Page: 86 / 110

CDM-840 Remote Router Revision 0
Forward Error Correction MN-CDM840
6–2
applications this is not a drawback. Links with LDPC normally operate at multi-megabit data
rates where latency effects are minimal. The standard block size for LDPC is 64,800 bits, and for
lower data rate applications there is a short frame block at 16,800 bits that suffers only a small
error correcting loss (0.2 to 0.5 dB) compared to the standard block.
6.2.1 Range of Data Rates
For the range of Data Rates, refer to Sect. 1.4 SUMMARY OF SPECIFICATIONS .
6.2.2 BER, QEF, Eb/No, Es/No Spectral Efficiency, and Occupied Bandwidth
Depending upon the operating mode, the DVB standard uses different modes of specifying
performance with a unit in IF Loop and Additive White Gaussian Noise (AWGN):
•
DVB-S2 standard: "Quasi Error Free" (QEF) is defined as "less than one uncorrected
error-event per transmission hour at the level of a 5 Mbit/s single TV service decoder",
approximately corresponding to a Transport Stream Packet Error Ratio equal to a
PER<10
-7
before demultiplexer. A packet is defined as block of 188 byte MPEG frame
size data.
•
Es/No vs. Eb/No: The DVB-S2 standard commonly refers to the use of Es/No instead of
Eb/No. When links operate at a constant symbol rate this is a good method for comparing
the performance of different modulation types and code rates.
The relation between the two quantities is given by:
Eb/No = Es/No – 10
log
(Spectral Efficiency)
•
Occupied Bandwidth: Occupied bandwidth is defined as the bandwidth between -10 dB
points of the power spectral density, which are approximately:
Occupied Bandwidth = 1.19
x
Symbol Rate, for 35% Rolloff
= 1.15
x
Symbol Rate, for 25% Rolloff
= 1.12 x Symbol Rate, for 20% Rolloff
* Taken at the -10 dB points on the plot of power spectral density, the occupied bandwidth is 1.19 x Symbol
Rate for 35%, and 1.15 x Symbol Rate for 25%.
6.3 VersaFEC (Short-block LDPC)
While LDPC coding represents a very significant development in the area of FEC and the
performance of LDPC is exceptional in terms of coding gain, its higher latency is considered
disadvantageous in some applications.
Since the introduction of Comtech’s LDPC, considerable research has been carried out to find
ways to reduce the block size of LDPC (and hence its latency) while preserving the coding gain
performance very close to the Shannon bound.
The VersaFEC code set was developed with two distinct purposes:
1) To provide an expanded choice of combinations of modulation and coding that significantly
reduces latency without compromising coding gain performance.