Document change history
First Editon
Feb. 18, 2008
Initial edition
Second Edition
Mar. 03, 2008
Edited the note on Pin No.8 of signal table as follows:
<Before editing>
“For VCC, connect I/O power of CPU. Debugging can be performed even if the signal is N.C.,
however, if you connect I/O power, it will allow prevention of leak during the target system power
OFF and adaptation to power
1.8V-5V range
.”
<After editing>
“For VCC, connect I/O power of CPU. Debugging can be performed even if the signal is N.C.,
however, if you connect I/O power, it will allow prevention of leak during the target system power
OFF and adaptation to power
1.8V-3.6V range.
”
Added the following description for Pin No.8 to the note on signal table.
"However, for input, it is 5V-tolerant. If optional conversion adapter (ADP-HUDI-5V) is used, 5V is
supported for output."
Third Edition
Aug. 07, 2008
Deleted the note from the pages on H8S and H8SX family CPU listings.
