Compal PEW76, Schematics Document

Page: 18 / 55

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDDR4_5
+VDD_CT
+SPV10
+VDDR3
+PCIE_VDDR
+PCIE_PVDD
+SPV_18
+MPV_18
+VDDCI
+1.5VSG
+1.8VSG
+3VSG
+1.8VSG
+1.8VSG
+VGA_CORE
+1.0VSG
+1.8VSG
+VGA_CORE
+1.8VSG
+1.8VSG
+1.0VSG
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
18 55 Tuesday, September 14, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
18 55 Tuesday, September 14, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
18 55 Tuesday, September 14, 2010
2009/7/14 2010/03/12
Compal Electronics, Inc.
60mA
5A
136mA
68mA
2A
400mA
136mA
170mA
2900mA
TBD
170mA
32mA
34.6A
For M96 SPV10=+GPU_CORE
For M97,Nahattan SPV10=+1.0VS
MPV18 For
Mahattan only
M97 and Mahattan VDDC and
VDDCI ball assignments are
different from M96, If M96 is
populated on this
design,VDDC and VDDCI
shoudl be shorted. 150mA
50mA
For M96 only,
Manhattan are NC pin
SPV18 For
Mahattan only
Confirm ATI, for
Mahattan, it could be
connected to VGA_CORE
BIF_VDDCI (T27,N27) need
isolate VGA_CORE
*Confirm with AMD
Reserve for PWR test
C332 1U_0402_6.3V
4Z
VG
A@
C332 1U_0402_6.3V
4Z
VG
A@
1
2
C331 1U_0402_6.3V
4Z
VG
A@
C331 1U_0402_6.3V
4Z
VG
A@
1
2
C326 1U_0402_6.3V
4Z
VG
A@
C326 1U_0402_6.3V
4Z
VG
A@
1
2
C337 1U_0402_6.3V
4Z
VG
A@
C337 1U_0402_6.3V
4Z
VG
A@
1
2
C317 1U_0402_6.3V
4Z
VG
A@
C317 1U_0402_6.3V
4Z
VG
A@
1
2
L96
FBMA-L11-201209-221LMA30T_0805
VGA@ L96
FBMA-L11-201209-221LMA30T_0805
VGA@
1 2
C277 1U_0402_6.3V
4Z
VG
A@
C277 1U_0402_6.3V
4Z
VG
A@
1
2
C381 0.1U_0402_16V
4Z
VG
A@
C381 0.1U_0402_16V
4Z
VG
A@
1
2
C338 0.1U_0402_16V
4Z
VG
A@
C338 0.1U_0402_16V
4Z
VG
A@
1
2
C309 10U_0805_6.3V
6M
VG
A@
C309 10U_0805_6.3V
6M
VG
A@
1
2
C328 1U_0402_6.3V
4Z
VG
A@
C328 1U_0402_6.3V
4Z
VG
A@
1
2
L34
BLM18AG121SN1D_0603 VGA@ L34
BLM18AG121SN1D_0603 VGA@
1 2
C375 1U_0402_6.3V
4Z
VG
A@
C375 1U_0402_6.3V
4Z
VG
A@
1
2
C275 1U_0402_6.3V
4Z
VG
A@
C275 1U_0402_6.3V
4Z
VG
A@
1
2
C383 10U_0805_6.3V
6M
VG
A@
C383 10U_0805_6.3V
6M
VG
A@
1
2
C370 1U_0402_6.3V
4Z
VG
A@
C370 1U_0402_6.3V
4Z
VG
A@
1
2
C343 10U_0805_6.3V
6M
VG
A@
C343 10U_0805_6.3V
6M
VG
A@
1
2
C315 0.1U_0402_16V
4Z
VG
A@
C315 0.1U_0402_16V
4Z
VG
A@
1
2
C374 1U_0402_6.3V
4Z
VG
A@
C374 1U_0402_6.3V
4Z
VG
A@
1
2
C361 0.1U_0402_16V
4Z
VG
A@
C361 0.1U_0402_16V
4Z
VG
A@
1
2
C367 1U_0402_6.3V
4Z
VG
A@
C367 1U_0402_6.3V
4Z
VG
A@
1
2
C278 1U_0402_6.3V
4Z
VG
A@
C278 1U_0402_6.3V
4Z
VG
A@
1
2
C350 0.1U_0402_16V
4Z
VG
A@
C350 0.1U_0402_16V
4Z
VG
A@
1
2
C282 0.1U_0402_16V
4Z
VG
A@
C282 0.1U_0402_16V
4Z
VG
A@
1
2
C335 1U_0402_6.3V
4Z
VG
A@
C335 1U_0402_6.3V
4Z
VG
A@
1
2
C322 1U_0402_6.3V
4Z
VG
A@
C322 1U_0402_6.3V
4Z
VG
A@
1
2
C359 10U_0603_6.3V
6M
VG
A@
C359 10U_0603_6.3V
6M
VG
A@
1
2
C297 1U_0402_6.3V
4Z
VG
A@
C297 1U_0402_6.3V
4Z
VG
A@
1
2
C290 1U_0402_6.3V
4Z
VG
A@
C290 1U_0402_6.3V
4Z
VG
A@
1
2
C356 10U_0603_6.3V
6M
VG
A@
C356 10U_0603_6.3V
6M
VG
A@
1
2
C339 10U_0805_6.3V
6M
VG
A@
C339 10U_0805_6.3V
6M
VG
A@
1
2
C329 1U_0402_6.3V
4Z
VG
A@
C329 1U_0402_6.3V
4Z
VG
A@
1
2
R569 0_0603_5%
VGA@
R569 0_0603_5%
VGA@
1 2
C293 1U_0402_6.3V
4Z
VG
A@
C293 1U_0402_6.3V
4Z
VG
A@
1
2
C384 10U_0805_6.3V
6M
VG
A@
C384 10U_0805_6.3V
6M
VG
A@
1
2
C368 1U_0402_6.3V
4Z
VG
A@
C368 1U_0402_6.3V
4Z
VG
A@
1
2
C304 10U_0805_6.3V
6M
VG
A@
C304 10U_0805_6.3V
6M
VG
A@
1
2
C285 1U_0402_6.3V
4Z
VG
A@
C285 1U_0402_6.3V
4Z
VG
A@
1
2
C280 1U_0402_6.3V
4Z
VG
A@
C280 1U_0402_6.3V
4Z
VG
A@
1
2
L26
BLM18AG121SN1D_0603
VGA@ L26
BLM18AG121SN1D_0603
VGA@
1 2
C357 1U_0402_6.3V
4Z
VG
A@
C357 1U_0402_6.3V
4Z
VG
A@
1
2
C310 1U_0402_6.3V
4Z
VG
A@
C310 1U_0402_6.3V
4Z
VG
A@
1
2
C307 10U_0805_6.3V
6M
VG
A@
C307 10U_0805_6.3V
6M
VG
A@
1
2
C341 10U_0805_6.3V
6M
VG
A@
C341 10U_0805_6.3V
6M
VG
A@
1
2
C365 0.1U_0402_16V
4Z
VG
A@
C365 0.1U_0402_16V
4Z
VG
A@
1
2
C363 0.1U_0402_16V
4Z
VG
A@
C363 0.1U_0402_16V
4Z
VG
A@
1
2
C377 10U_0603_6.3V
6M
VG
A@
C377 10U_0603_6.3V
6M
VG
A@
1
2
C376 1U_0402_6.3V
4Z
VG
A@
C376 1U_0402_6.3V
4Z
VG
A@
1
2
C312 1U_0402_6.3V
4Z
VG
A@
C312 1U_0402_6.3V
4Z
VG
A@
1
2
C272 1U_0402_6.3V
4Z
VG
A@
C272 1U_0402_6.3V
4Z
VG
A@
1
2
C276 1U_0402_6.3V
4Z
VG
A@
C276 1U_0402_6.3V
4Z
VG
A@
1
2
C313 10U_0603_6.3V
6M
VG
A@
C313 10U_0603_6.3V
6M
VG
A@
1
2
C358 0.1U_0402_16V
4Z
VG
A@
C358 0.1U_0402_16V
4Z
VG
A@
1
2
C284 1U_0402_6.3V
4Z
VG
A@
C284 1U_0402_6.3V
4Z
VG
A@
1
2
C279 1U_0402_6.3V
4Z
VG
A@
C279 1U_0402_6.3V
4Z
VG
A@
1
2
+
C693
330U_D2_2V_Y
@
+
C693
330U_D2_2V_Y
@
1
2
C373 1U_0402_6.3V
4Z
VG
A@
C373 1U_0402_6.3V
4Z
VG
A@
1
2
C299 1U_0402_6.3V
4Z
VG
A@
C299 1U_0402_6.3V
4Z
VG
A@
1
2
L32
BLM18AG121SN1D_0603
VGA@ L32
BLM18AG121SN1D_0603
VGA@
1 2
C324 1U_0402_6.3V
4Z
VG
A@
C324 1U_0402_6.3V
4Z
VG
A@
1
2
C334 1U_0402_6.3V
4Z
VG
A@
C334 1U_0402_6.3V
4Z
VG
A@
1
2
C294 1U_0402_6.3V
4Z
VG
A@
C294 1U_0402_6.3V
4Z
VG
A@
1
2
C300 1U_0402_6.3V
4Z
VG
A@
C300 1U_0402_6.3V
4Z
VG
A@
1
2
C319 1U_0402_6.3V
4Z
VG
A@
C319 1U_0402_6.3V
4Z
VG
A@
1
2
C320 1U_0402_6.3V
4Z
VG
A@
C320 1U_0402_6.3V
4Z
VG
A@
1
2
C286 1U_0402_6.3V
4Z
VG
A@
C286 1U_0402_6.3V
4Z
VG
A@
1
2
C380 1U_0402_6.3V
4Z
VG
A@
C380 1U_0402_6.3V
4Z
VG
A@
1
2
C291 1U_0402_6.3V
4Z
VG
A@
C291 1U_0402_6.3V
4Z
VG
A@
1
2
C283 0.1U_0402_16V
4Z
VG
A@
C283 0.1U_0402_16V
4Z
VG
A@
1
2
C345 10U_0805_6.3V
6M
VG
A@
C345 10U_0805_6.3V
6M
VG
A@
1
2
C316 1U_0402_6.3V
4Z
VG
A@
C316 1U_0402_6.3V
4Z
VG
A@
1
2
C369 1U_0402_6.3V
4Z
VG
A@
C369 1U_0402_6.3V
4Z
VG
A@
1
2
C305 10U_0603_6.3V
6M
MA
D
@
C305 10U_0603_6.3V
6M
MA
D
@
1
2
C306 10U_0603_6.3V
6M
VG
A@
C306 10U_0603_6.3V
6M
VG
A@
1
2
+
C340
330U_D2_2V_Y
VGA@
+
C340
330U_D2_2V_Y
VGA@
1
2
C301 1U_0402_6.3V
4Z
VG
A@
C301 1U_0402_6.3V
4Z
VG
A@
1
2
C292 1U_0402_6.3V
4Z
VG
A@
C292 1U_0402_6.3V
4Z
VG
A@
1
2
C333 1U_0402_6.3V
4Z
VG
A@
C333 1U_0402_6.3V
4Z
VG
A@
1
2
L27
BLM18AG601SN1D_2P
VGA@ L27
BLM18AG601SN1D_2P
VGA@
1 2
C346 10U_0805_6.3V
6M
VG
A@
C346 10U_0805_6.3V
6M
VG
A@
1
2
C308 10U_0805_6.3V
6M
VG
A@
C308 10U_0805_6.3V
6M
VG
A@
1
2
C271 1U_0402_6.3V
4Z
VG
A@
C271 1U_0402_6.3V
4Z
VG
A@
1
2
C349 1U_0402_6.3V
4Z
VG
A@
C349 1U_0402_6.3V
4Z
VG
A@
1
2
C321 1U_0402_6.3V
4Z
VG
A@
C321 1U_0402_6.3V
4Z
VG
A@
1
2
C379 0.1U_0402_16V
4Z
VG
A@
C379 0.1U_0402_16V
4Z
VG
A@
1
2
C366 10U_0603_6.3V
6M
VG
A@
C366 10U_0603_6.3V
6M
VG
A@
1
2
C288 1U_0402_6.3V
4Z
VG
A@
C288 1U_0402_6.3V
4Z
VG
A@
1
2
C273 1U_0402_6.3V
4Z
VG
A@
C273 1U_0402_6.3V
4Z
VG
A@
1
2
C323 1U_0402_6.3V
4Z
VG
A@
C323 1U_0402_6.3V
4Z
VG
A@
1
2
C281 1U_0402_6.3V
4Z
VG
A@
C281 1U_0402_6.3V
4Z
VG
A@
1
2
C314 1U_0402_6.3V
4Z
VG
A@
C314 1U_0402_6.3V
4Z
VG
A@
1
2
C342 10U_0805_6.3V
6M
VG
A@
C342 10U_0805_6.3V
6M
VG
A@
1
2
L31
BLM18AG121SN1D_0603
VGA@ L31
BLM18AG121SN1D_0603
VGA@
1 2
C336 10U_0603_6.3V
6M
VG
A@
C336 10U_0603_6.3V
6M
VG
A@
1
2
C364 1U_0402_6.3V
4Z
VG
A@
C364 1U_0402_6.3V
4Z
VG
A@
1
2
C287 1U_0402_6.3V
4Z
VG
A@
C287 1U_0402_6.3V
4Z
VG
A@
1
2
C295 1U_0402_6.3V
4Z
VG
A@
C295 1U_0402_6.3V
4Z
VG
A@
1
2
C378 1U_0402_6.3V
4Z
VG
A@
C378 1U_0402_6.3V
4Z
VG
A@
1
2
C327 1U_0402_6.3V
4Z
VG
A@
C327 1U_0402_6.3V
4Z
VG
A@
1
2
C344 10U_0805_6.3V
6M
VG
A@
C344 10U_0805_6.3V
6M
VG
A@
1
2
L24
BLM18AG601SN1D_2P
VGA@ L24
BLM18AG601SN1D_2P
VGA@
1 2
C372 1U_0402_6.3V
4Z
VG
A@
C372 1U_0402_6.3V
4Z
VG
A@
1
2
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
216-0729002 A12 M96_BGA962
U5E
MAD@
POWER
PLL
PCIE
CORE
MEM I/O
MEM CLK
I/O
BACK BIAS
LEVEL
TRANSLATION
ISOLATED
CORE I/O
216-0729002 A12 M96_BGA962
U5E
MAD@
PCIE_PVDD
AB37
NC_MPV18#1
H7
NC_MPV18#2
H8
NC_SPV18
AM10
PCIE_VDDC#1
G30
PCIE_VDDC#10
R28
PCIE_VDDC#11
T28
PCIE_VDDC#12
U28
PCIE_VDDC#2
G31
PCIE_VDDC#3
H29
PCIE_VDDC#4
H30
PCIE_VDDC#5
J29
PCIE_VDDC#6
J30
PCIE_VDDC#7
L28
PCIE_VDDC#8
M28
PCIE_VDDC#9
N28
PCIE_VDDR#1
AA31
PCIE_VDDR#2
AA32
PCIE_VDDR#3
AA33
PCIE_VDDR#4
AA34
PCIE_VDDR#5
V28
PCIE_VDDR#6
W29
PCIE_VDDR#7
W30
PCIE_VDDR#8
Y31
SPV10
AN9
SPVSS
AN10
VDDR1#1
AC7
VDDR1#10
G17
VDDR1#11
G20
VDDR1#12
G23
VDDR1#13
G26
VDDR1#14
G29
VDDR1#15
H10
VDDR1#16
J7
VDDR1#17
J9
VDDR1#18
K11
VDDR1#19
K13
VDDR1#2
AD11
VDDR1#20
K8
VDDR1#21
L12
VDDR1#22
L16
VDDR1#23
L21
VDDR1#24
L23
VDDR1#25
L26
VDDR1#26
L7
VDDR1#27
M11
VDDR1#28
N11
VDDR1#29
P7
VDDR1#3
AF7
VDDR1#30
R11
VDDR1#31
U11
VDDR1#32
U7
VDDR1#33
Y11
VDDR1#34
Y7
VDDR1#4
AG10
VDDR1#5
AJ7
VDDR1#6
AK8
VDDR1#7
AL9
VDDR1#8
G11
VDDR1#9
G14
VDDR3#1
AF23
VDDR3#2
AF24
VDDR3#3
AG23
VDDR3#4
AG24
VDDR5#1
AF13
VDDR5#2
AF15
VDDR5#3
AG13
VDDR5#4
AG15
VDDR4#1
AD12
VDDR4#2
AF11
VDDR4#3
AF12
VDDR4#4
AG11
VDDRHA
M20
VDDRHB
V12
VSSRHA
M21
VSSRHB
U12
VDD_CT#1
AF26
VDD_CT#2
AF27
VDD_CT#3
AG26
VDD_CT#4
AG27
VDDC#1
AA15
VDDC#10
AB21
VDDC#11
AB23
VDDC#12
AB26
VDDC#13
AB28
VDDC#14
AC12
VDDC#15
AC15
VDDC#16
AC17
VDDC#17
AC20
VDDC#18
AC22
VDDC#19
AC24
VDDC#2
AA17
VDDC#20
AC27
VDDC#21
AD13
VDDC#22
AD16
VDDC#23
AD18
VDDC#24
AD21
VDDC#25
AD23
VDDC#26
AD26
VDDC#27
AF17
VDDC#28
AF20
VDDC#29
AF22
VDDC#3
AA20
VDDC#30
AG16
VDDC#31
AG18
VDDC#32
AG21
VDDC#33
AH22
VDDC#34
M16
VDDC#35
M18
VDDC#36
M23
VDDC#37
M26
VDDC#38
N15
VDDC#39
N17
VDDC#4
AA22
VDDC#40
N20
VDDC#41
N22
VDDC#42
N24
VDDC#43
N27
VDDC#44
R13
VDDC#45
R16
VDDC#46
R18
VDDC#47
R21
VDDC#48
R23
VDDC#49
R26
VDDC#5
AA24
VDDC#50
T15
VDDC#51
T17
VDDC#52
T20
VDDC#53
T22
VDDC#54
T24
VDDC#55
T27
VDDC#56
U16
VDDC#57
U18
VDDC#58
U21
VDDC#59
U23
VDDC#6
AA27
VDDC#60
U26
VDDC#61
V15
VDDC#62
V17
VDDC#63
V20
VDDC#64
V22
VDDC#65
V24
VDDC#66
V27
VDDC#67
Y16
VDDC#68
Y18
VDDC#69
Y21
VDDC#7
AB13
VDDC#70
Y23
VDDC#71
Y26
VDDC#72
Y28
VDDC#8
AB16
VDDC#9
AB18
VDDCI#1
M15
VDDCI#2
N13
VDDCI#3
R12
VDDCI#4
T12
BBP#1
AA13
BBP#2
Y13
VDDC#73
AH27
VDDC#74
AH28
C348 10U_0603_6.3V
6M
VG
A@
C348 10U_0603_6.3V
6M
VG
A@
1
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C325 1U_0402_6.3V
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C325 1U_0402_6.3V
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C296 1U_0402_6.3V
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C296 1U_0402_6.3V
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C311 1U_0402_6.3V
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C311 1U_0402_6.3V
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C302 1U_0402_6.3V
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C302 1U_0402_6.3V
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C298 1U_0402_6.3V
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C298 1U_0402_6.3V
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1
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C289 10U_0805_6.3V
6M
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C289 10U_0805_6.3V
6M
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1
2
C371 1U_0402_6.3V
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C371 1U_0402_6.3V
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L35
BLM18AG121SN1D_0603
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BLM18AG121SN1D_0603
VGA@
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C303 1U_0402_6.3V
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C303 1U_0402_6.3V
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C360 1U_0402_6.3V
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C360 1U_0402_6.3V
4Z
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C347
330U_D2_2V_Y
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330U_D2_2V_Y
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C362 1U_0402_6.3V
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C362 1U_0402_6.3V
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C330 1U_0402_6.3V
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C330 1U_0402_6.3V
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C274
330U_D2_2V_Y
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VGA@
1
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C382 10U_0805_6.3V
6M
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C382 10U_0805_6.3V
6M
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1
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L25
BLM18AG121SN1D_0603
VGA@ L25
BLM18AG121SN1D_0603
VGA@
1 2
L97
FBMA-L11-201209-221LMA30T_0805
VGA@ L97
FBMA-L11-201209-221LMA30T_0805
VGA@
1 2
C318 1U_0402_6.3V
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C318 1U_0402_6.3V
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