
P4LA User’s Manual Hardware Setup
Enhanced IDE Interface
19
2.6 <Enhanced IDE interface>
The Intel
®
ICH7R (south bridge chip) supports one enhanced IDE interface, dual channel
for two ATAPI devices with ATA100. Based on this function,
P4LA
has one 40-pin IDE
connector with jumper selectable for pin-20 +5V supported.
The board supports 32-pin
DiskOnChip 2000
. The onboard 32-pin socket, DOC, supports
DiskOnChip2000 single chip flash disk in 32-pin DIP JEDEC with jumper selectable address
on jumper JDOC.
IDE1
JDOC
DOC
Jumper:
JDOC
3
1
Type: onboard 3-pin header
JDOC
JDOC DiskOnChip
Address
1-2
D800h
2-3
D000h
Default setting
Jumper:
JCFSEL
3
1
JCFSEL
Type: onboard 3-pin header
JCFSEL
Compact Flash Address Setting
1-2
Master
2-3
Slave
Default setting
Summary of Contents for P4LA
Page 1: ...P4LA Industrial motherboard User s Manual Edition 1 00 2006 05 30 ...
Page 6: ...P4LA User s Manual 6 This Page is Left for Blank ...
Page 12: ...P4LA User s Manual Introduction Mechanial Drawing 12 1 5 Mechanical Drawing ...
Page 34: ...P4LA User s Manual 34 This Page is Left for Blank ...
Page 55: ...P4LA User s Manual I O Port Pin Assignment I 55 ...
Page 56: ...P4LA User s Manual System Resources I O Port Address Map 56 B2 Memory Address Map ...
Page 57: ...P4LA User s Manual I O Port Pin Assignment I 57 B3 System IRQ DMA Resources DMA IRQ ...