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8571—Technical description
348
NGT Transceiver System Technical Service Manual
Automatic equalisation
A request to commence equalisation of the 8571 may be initiated either by setting
switch
S1
on the Microprocessor & TCVR Interface PCB to position E (see
)
and switching the 8571 off then on again, or by sending a command from the handset of
the transceiver.
Figure 9: Location of switch S1
When this occurs, the microprocessor in the 8571 carries out the following procedure.
The microprocessor sends a request via the signalling modem to the master 8571 to
transmit a 300 Hz tone for approximately two seconds. During this period, the slave
8571 microprocessor first sets the 300 Hz threshold amplifier IC104a (on the Dual Line
Equaliser PCB) to maximum gain. It then commences to decrease the gain by reducing
the DC current on pin 1 until the 300 Hz detector output goes low (IC105b pin 7). The
microprocessor then resets the control current for a gain of 6 dB above threshold and
stores this gain setting.
The microprocessor then requests the master 8571 to repeat the 300 Hz transmission for
five seconds. The microprocessor measures the level of audio on the Rx audio bus line
(output of modem IC6) by using its internal ADC at pin 63. The microprocessor then
changes the DC level output of the DAC IC2 pin 14 (on the Dual Line Equaliser PCB),
which adjusts the gain of the amplifier IC103a. This continues until the level on the Rx
audio bus line measures 200 mV RMS.
The microprocessor then requests a 2 kHz tone for five seconds from the master 8571.
Again the level is monitored on the Rx audio bus and the microprocessor adjusts the gain
of the equalisation amplifiers IC103b and IC104b (by adjusting the DC output of the
DAC IC2 pin 15) for a level of 80 mV RMS on the audio bus line.
Because of the interaction between the two operations, the sequence is repeated for a
maximum of 20 attempts to set both audio levels within
±
10 mV of the levels specified
above.
IC13
IC12
IC6
IC14
S1
IC7
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