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The second IF passes through U1 (BA4116) internal squelch control R166, C138, C139 form as a squelch
amplifier. The ceramic filter produces a squelch signal (RF noise). Pin 14 of U1 sends the digital squelch
control signal to the CPU mute the audio speaker path. Pin 12 of U1 output a RSSI level to the CPU.
Low Voltage Detection
The battery voltage, divided by R221, R222 is input to U7 Pin 6 for voltage level sample.
Vibration Alert
When vibration alert is on, Pin54 of U7 output HI level, Q23 switch on, M1 MOTORS vibrates.
Voice recorder
Voice recorder consists of U13 NJM4053 and U402 ISD1730. U13 Pin14 select voice source from P13
(MIC) or P12 (RX voice). The voice signal comes to U402 Pin9. U402 store the voice in it up to 20 seconds.
When U402 play, the voice come out form U402 Pin17. Then pass to U13 Pin15, after that pass to Pin1
(speaker) or Pin2 (TX).
VOX
The audio is picked up from the internal MIC, the audio signal is then amplified by Audio Amplifier, U9
LM324 (4/4), U9 (1/4) and passes to D25. D25 convert audio to a DC signal, then passes to U5 Pin1 DAC
input. There is another VOX path which consist of Q30, U7 (2/4), U7 (3/4). This is a 300Hz low-pass filter.
After that the audio passes to U5 Pin2 DAC input. Two VOX signals let the VOX works well in a noisy
place.
PLL (Phase Lock Loop) Circuit:
The receiver and transmitter both share the same PLL (Phase Lock Loop) Circuit to produce the carrier or
the receive frequency. The local oscillator consists of a fundamental frequency oscillator X2 20.95MHz and
U2 (KB8825). A phase Lock Loop (PLL) U6 (KB8825), VHF TX VCO Q20, VHF RX VCO Q16 and UHF
VCO Q13, Q14. The fundamental frequency is frequency divided by U6 and a 12.5 kHz signal is produced.
When the VCO frequency applied to and frequency divided by U2 produces a frequency comparable to
12.5 kHz, PLL will control the VCO. When these two frequencies are matched, a constant control voltage
is output from PLL to lock VCO in desired frequency. The PLL also will output a lock indication to MCU to
indicate the PLL is in frequency lock state.
Memory Backup
U11 is an EEPROM AT24 C16 that acts as a memory backup for the working channel code and the
system parameters. Every time when the unit is switched on, the MCU will reset the system, clear the
RAM, and recall in the memory from the EEPROM to refresh the RAM in CPU U5.
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Summary of Contents for MR HH425 LI VP
Page 7: ...BLOCK DIAGRAM BACKLIGHT BACKLIGHT 7 ...
Page 11: ...Main PCB Top View Bottom View VR3 VR2 VC1 L44 L46 SQL L45 11 ...
Page 12: ...WIRING DIAGRAM CHARGER CHARGER 12 ...
Page 13: ...Main PCB Top View PRINTED CIRCUIT BOARD SQL 13 ...
Page 14: ...Main PCB Bottom View PRINTED CIRCUIT BOARD 14 ...
Page 15: ...Charger PCB PRINTED CIRCUIT BOARD Top View Bottom View LCD PCB Bottom View Top View 15 ...
Page 18: ...MAIN UNIT EXPLODED VIEW 18 ...
Page 19: ...CHARGER UNIT EXPLODED VIEW 19 ...
Page 20: ...BATTERY TRAY UNIT EXPLODED VIEW 20 ...
Page 48: ...U4 9032 HT D 48 ...
Page 49: ...U5 M38C29FFAHP60K 49 ...
Page 50: ...2 1 3 1 VOUT 2 VSS 3 VIN Delay Circuitry Vref VSS VOUT VIN U6 XC61FC4012MR U7 U8 U9 NJM324 50 ...
Page 51: ...1 2 3 4 8 7 6 5 A0 A1 A2 GND VCC WP SCL SDA U AT C N 11 24 16 U12 XC6204B502MR 51 ...