GR740-UM-DS, Nov 2017, Version 1.7
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GR740
16.3
Operation
16.3.1 Operating modes
The core contains three separate control units for the Bus Controller, Remote Terminal and Bus Mon-
itor handling, with a shared 1553 codec. The operating mode of the core is controlled by starting and
stopping of these units via register writes. At start-up, none of the parts are enabled, and the core is
completely passive on both the 1553 and AMBA bus.
The BC and RT parts of the core can not be active on the 1553 bus at the same time. While the BC is
running or suspended, only the BC (and possibly BM) has access to the 1553 bus, and the RT can only
receive and respond to commands when both the BC schedules are completely stopped (not running
or even suspended).
The Bus Monitor, however, is only listening on the codec receivers and can therefore operate regard-
less of the enabled/disabled state of the other two parts.
16.3.2 Register interface
The core is configured and controlled through control registers accessed over the APB bus. Each of
the BC, RT, BM parts has a separate set of registers, plus there is a small set of shared registers.
Some of the control register fields for the BC and RT are protected using a ‘key’, a field in the same
register that has to be written with a certain value for the write to take effect. The purpose of the keys
are to give RT/BM designers a way to ensure that the software can not interfere with the bus traffic by
enabling the BC or changing the RT address. If the software is built without knowledge of the key to a
certain register, it is very unlikely that it will accidentally perform a write with the correct key to that
control register.
16.3.3 Interrupting
The core has one interrupt output, which can be generated from several different source events. Which
events should cause an interrupt can be controlled through the IRQ Enable Mask register.
16.3.4 MIL-STD-1553 Codec
The core’s internal codec receives and transmits data words on the 1553 bus, and generates and
checks sync patterns and parity.
Loop-back checking logic checks that each transmitted word is also seen on the receive inputs. If the
transmitted word is not echoed back, the transmitter stops and signals an error condition, which is
then reported back to the user.
