GR740-UM-DS, Nov 2017, Version 1.7
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GR740
13.2.1 Port numbering
The router’s ports are numbered as follows: configuration port has port number 0, the SpaceWire
ports have port numbers 1-8, and the AMBA ports have port numbers 9-12.
13.2.2 Routing table
A single routing table is provided. The access to the routing table is arbitrated using a round-robin
arbiter with each port being of equal priority. The operation is pipelined and one lookup can be done
each cycle. This way, the maximum latency is equal to the number of ports in the router minus one.
The impact on throughput should be negligible provided that packets do not arrive at the same time.
The probability for this is higher when the traffic only consists of very small packets sent continu-
ously (the average size being about the same as the number of ports). This should be a very uncom-
mon case. Latency is still bounded and probably negligible in comparison to other latencies in most
systems.
The routing table is configured with either RMAP or AMBA AHB accesses to the configuration port.
Configuration of the routing table does not introduce any extra latency for packets since the configu-
ration accesses have lower priority than packet traffic. The routing table is split into two parts, one
which controls the port mapping for the address (RTR.RTPMAP registers) and one which controls
properties for the address such as priority and header deletion (RTR.RTACTRL registers).
13.2.3 Port mapping
Each physical and logical address can be mapped to one or several output port(s). This is done by pro-
gramming the corresponding RTR.RTPMAP register. The RTR.RTPMAP registers also control
whether or not group adaptive routing or packet distribution shall be used for incoming packets with a
specific address. The RTR.RTPMAP registers are not initialized after reset / power-up. For physical
addresses this has the effect that the incoming packet is routed to the port that matches the address in
the packet without any group adaptive routing or packet distribution. For logical addresses an unini-
tialized RTR.RTPMAP register (or if the RTR.RTPMAP.PE field has been written with all zeros) has
the effect that the incoming packet is spilled. See table 175 in section 13.5.3 for more details.
13.2.4 Address control
For each physical and logical address it is possible to configure the priority and to enable the spill-if-
not-ready feature (explained in section 13.2.10). For each logical address it is further possible to
enable/ disable the address and to enable / disable header deletion. Physical addresses are always
enabled and have always header deletion enabled, as specified by ECSS-E-ST-50-12C [SPW]. An
address is configured by programming the corresponding RTR.RTACTRL register. Logical addresses
are disabled after reset / power-up. An incoming packet with a disabled logical address is spilled. See
table 176 in section 13.5.3 for details.
13.2.5 Output port arbitration
Each output port is arbitrated individually based on the address of the incoming packet, using two pri-
ority levels, with round-robin at each level. Each physical address and logical address can be config-
ured in the routing table (RTR.RTACTRL register) to have either high or low priority. Priority
assignments can have a significant impact on packet delays because packets can be large and the
speed of the data consumer and link itself may not be known. This should therefore be considered
when assigning priorities.
13.2.6 Group adaptive routing
Group adaptive routing can be used to map specific addresses to a group of output ports. Incoming
packets with such addresses are automatically routed to the first port in the group that is not busy. It