www
.mcu.com.cn
32
/
239
Rev.
1.00
CMS80F731x Reference Manual
3.4
Watchdog Reset
Watchdog reset is a protective setting of the system. In normal condition, the watchdog timer is cleared to zero by the
program. If an error occurs, the system is in an unknown state, the watchdog timer overflows, and the system resets. After the
watchdog is reset, the system reboots into a normal state.
WDT counter is not addressable, the program starts counting after the power-on reset is completed, and it is recommended
to clear the WDT counter first when setting the WDT register in order to accurately control the overflow time of the WDT.
The timing of the watchdog reset is as follows:
1)
Watchdog timer status: the system detects whether the watchdog timer overflows, if overflowing, the system resets;
2)
Initialization: all system registers are set to the default state;
3)
Program: The reset is complete and the program starts running from 0000H.
The clock source for the WDT is provided by the system clock, and the timing base period of the WDT counter is Tsys. After
the WDT overflow resets the CPU with all registers, the program executes immediately after 1 Tsys from 0000H. The WDT reset
does not reconfigure the power-on reset. The overflow time of the watchdog can be set by the program, and the overflow time
can be selected in the CKCON register WDS2-WTS0. The watchdog overflow time is shown in the following table:
WTS[2:0]
Watchdog Interval
Number of clocks
OVT@Fsys=16MHz
OVT@Fsys=48MHz
000
2
17
131072
8.192ms
2.731ms
001
2
18
262144
16.384ms
5.461ms
010
2
19
524288
32.768ms
10.923ms
011
2
20
1048576
65.536ms
21.845ms
100
2
21
2097152
131.072ms
43.691ms
101
2
22
4194304
262.144ms
87.381ms
110
2
24
16777216
1.048s
349.525ms
111
2
26
67108864
4.194s
1.398s
WDT can also be set to not reset the system, which can produce an interrupt.
3.5
Software Reset
Inside the chip, the program software resets, which relocates the program flow to the reset address 0000H and then runs
the program again. The user-writable software reset control bit WDCON[7] (SWRST=1) implements a custom software reset.
The software reset does not reconfigure the power-on reset.
