BAT32G1x9 user manual | Chapter 20 Serial interface IICA
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20.5.2
address
The next 7 bits of data for the start condition are defined as addresses.
The address is 7 bits of data output by the master device in order to select a particular slave device from a
plurality of slave devices connected to the bus. Therefore, the slave devices on the bus need to be set to completely
different addresses.
The slave detects the start condition through the hardware and checks whether the 7-bit data is the same as the
contents of the slave address register n(SVAn). At this time, if the 7-bit data and the value of the SVAn register are the
same, the slave is selected to communicate with the master device before the master generates a start or stop
condition.
Figure 20-14
address
SCLAn
SDAAn
address
INTIICAn
Note: If data other than the local station address or extension code is received while the slave is running, INTIICAn is not
generated.
If the 8-bit data consisting 20.5.3The designation
of the Transmission
Direction in 20.5.3" is written to the IICA shift register n (IICAn ), the output address. The received address is written
to the IICAn register. The slave address is assigned 7 bits high in the IICAn register.
20.5.3
The designation of the transmission direction
The master device sends 1 bit of data in the specified transmission direction after the 7-bit address.
When this transfer direction is specified as a bit of "0", it means that the master device sends data to the slave
device; When this transfer direction is specified as bit "1", it means that the master device receives data from the
slave.
Figure 20-15
Designation of the transmission direction
SCLAn
SDAAn
Specifies the transfer direction
INTIICAn
Note: If data other than the local station address or extension code is received while the slave is running, INTIICAn is not
generated. Note
n = 0,1
concentrate
concentrate