CMT2380F17
Rev0.1 | 186/347
www.cmostek.com
All of the PCA modules can be used as PWM outputs. The frequency of the output depends on the clock
source for the PCA timer. All of the modules will have the same frequency of output because they all share
the PCA timer.
The duty cycle of each module is determined
by the module’s capture register CCAPnL and the
extended 9
th
bit, ECAPnL. When the 9-bit value of { 0, [CL] } is
less than
the 9-bit value of { ECAPnL,
[CCAPnL] } the output will be low, and if
equal to or greater than
the output will be high.
When CL overflows from 0xFF to 0x00, { ECAPnL, [CCAPnL] } is reloaded with the value of
{ ECAPnH, [CCAPnH] }. This allows updating the PWM without glitches. The PWMn and ECOMn bits in
the
module’s CCAPMn register must be set to enable the PWM mode.
Using the 9-bit comparison, the duty cycle of the output can be improved to really start from 0%, and
up to 100%. The formula for the duty cycle is:
Duty Cycle = 1
– { ECAPnH, [CCAPnH] } / 256.
Where,
[CCAPnH]
is the 8-bit value of the CCAPnH register, and
ECAPnH
(bit-1 in the PCAPWMn
register) is 1-bit value. So,
{ ECAPnH, [CCAPnH] }
forms a 9-bit value for the 9-bit comparator.
For examples,
a. If ECAPnH=0 & CCAPnH=0x00 (i.e., 0x000), the duty cycle is 100%.
b. If ECAPnH=0 & CCAPnH=0x40 (i.e., 0x040) the duty cycle is 75%.
c. If ECAPnH=0 & CCAPnH=0xC0 (i.e., 0x0C0), the duty cycle is 25%.
d. If ECAPnH=1 & CCAPnH=0x00 (i.e., 0x100), the duty cycle is 0%.
Figure 17-9. PCA Buffered 8-bit PWM Mode
17.4.6
Un-buffered 10/12/16-bit PWM Mode
The PCA provides the variable PWM mode to enhance the control capability on PWM application. There
are additional un-buffered 10/12/16 bits PWM can be assigned in each channel and each PWM channel with
different resolution can operate concurrently.
Summary of Contents for CMT2380F17
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Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
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