CMOSTEK CMT2157AW, Manual

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CMT2157AW
Rev 0.8 | Page 11/31 www.hoperf.com
4.2 FCC/ETSI Compliant Application Schematic
VDD
U1
C2
L2
C1
L1
C0
SW7
SW6
SW5
LED
VDD
GND
RFO
K7
K6
K5
1
2
3
4
5
6
7
D1
8
9
10
11
12
13
14
SW4
SW3
SW2
SW1
XTAL
CLK
DATA
K1
K2
K3
K4
X1
CLK
DATA
CMT2157AW
ANT
L3
C3
CLK
DATA
J1
1
2
3
4
VDD
Note: Connector J1 is for
EEPROM Programming
Figure 10. FCC/ETSI Compliant Application Schematic
Notes:
1. Connector J1 is a must for the CMT2157AW EEPROM access during development or manufacture phase.
2. The general layout guidelines are listed below. For more design details, please refer to “AN111 CMT215x Schematic and
PCB Layout Design Guideline”.

Use as much continuous ground plane metallization as possible.

Use as many grounding vias (especially near to the GND pins) as possible to minimize series parasitic inductance
between the ground pour and the GND pins.

Avoid using long and/or thin transmission lines to connect the components.

Avoid placing the nearby inductors in the same orientation to reduce the coupling between them.

Place C0 as close to the CMT2157AW as possible for better filtering.
3. The table below shows the BOM of 433.92/868.35 MHz FCC/ETSI Compliant Application. For the BOM of more
application, please refer to “AN111 CMT215x Schematic and PCB Layout Design Guideline”.
Table 8. BOM of 433.92/868.35 MHz FCC/ETSI Compliant Application
Designator Descriptions
Value
Unit Manufacturer
433.92 MHz 868.35 MHz
U1
CMT2157AW, 240 – 960 MHz (G)FSK/OOK
stand-alone transmitter with encoder
- -
CMOSTEK
X1 ±20 ppm, SMD32*25 mm crystal 26 MHz EPSON
C0 ±20%, 0402 X7R, 25 V 0.1 uF Murata GRM15
C1 ±5%, 0402 NP0, 50 V 68 68 pF Murata GRM15
C2 ±5%, 0402 NP0, 50 V 15 10 pF Murata GRM15
C3 ±5%, 0402 NP0, 50 V 15 6.8 pF Murata GRM15
L1 ±5%, 0603 multi-layer chip inductor 180 100 nH Murata LQG18
L2 ±5%, 0603 multi-layer chip inductor 36 5.6 nH Murata LQG18
L3 ±5%, 0603 multi-layer chip inductor 18 6.8 nH Murata LQG18
D1 D0603, red LED - - -
SW[7:0] Push buttons - - -