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6.
Technical Information
This chapter provides detailed technical information on the miniFLASH, including register layout and
the software interface for programming the FLASH.
Hardware Register Layout
The hardware registers are documented below.
FLASH Bank Selection Register
This register is located in memory-mapped I/O and is settable to $FF49, $FF59, $FF69, or $FF79 via
the jumper block on the board.
Bit 7 of this register is the FLASH Enable bit. This bit is set by the FLASH programming routine when
writing to the FLASH. Unless you fully understand what you are doing, you should never set this bit.
Bits 6-2 are undefined. Reads of these bits will always return zero. Writes to these bits are ignored.
Bits 1-0 are used to software select one of the 16K FLASH banks (0 - 3).
FLASH Software Interface
Assembly language programmers who wish to access the FLASH read/write routines in FLASH.BIN
may do so using the following information.
The FLASH.BIN routine loads at $7000 and can be called by JSRing to that location. The routine
either reads or writes one page (128 bytes) of the FLASH. Subsequent calls are required to program
an entire bank. In ROM Read mode, the contents of ROM Paks can also be read if the value at
$7100 is $00.
Summary of Contents for miniFLASH
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