
Schematic Diagrams
B - 6 Processor 4/7
B.Schematic Diagrams
Processor 4/7
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
NEAR CPU
CAD Note: Capacitor need to be placed
close to buffer output pin
CFG7
DEFENSIVE PULL DOWN SITE
1: (Default) PEG Train immediately following xxRESETB de assertion
0: PEG Wait for BIOS for training
CFG4
1: DISABLED;
NO PHYSICAL DISPLAY PORT ATTACHED
TO EMBEDDED DISPLAY PORT
0: ENABLED;
AN EXTERNAL DISPLAY PORT DEVICE
IS CONNECTED TO THE EMBEDDED
DISPLAY PORT
DISPLAY PORT PRESENCE STRAP
CFG2
1: (DEFAULT)NORMAL OPERATION;
LANE# DEFINITION MATCHES
SOCKET PIN MAP DEFINITION
0: LANE REVERSAL
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PCIE PORT BIFURCATION STRAPS
TO EC
VCCST_PWRGD
CFG[0]: Stall reset sequence after PCU
Θ
Θ
Θ
Θ
PLL lock until de-asserted:
— 1 = (Default) Normal Operation;
No stall.
— 0 = Stall.
CFG[1]: Reserved configuration lane.
Θ
Θ
Θ
Θ
CFG[2]: PCI Express* Static x16 Lane
Θ
Θ
Θ
Θ
Numbering Reversal.
— 1 = Normal operation
— 0 = Lane numbers reversed.
CFG[3]: Reserved configuration lane.
Θ
Θ
Θ
Θ
CFG[4]: eDP enable:
Θ
Θ
Θ
Θ
— 1 = Disabled.
— 0 = Enabled.
CFG[6:5]: PCI Express* Bifurcation
Θ
Θ
Θ
Θ
— 00 = 1 x8, 2 x4 PCI Express*
— 01 = reserved
— 10 = 2 x8 PCI Express*
— 11 = 1 x16 PCI Express*
CFG[7]: PEG Training:
Θ
Θ
Θ
Θ
— 1 = (default) PEG Train
immediately following RESET# de
assertion.
— 0 = PEG Wait for BIOS for
training.
CFG[19:8]: Reserved configuration
Θ
Θ
Θ
Θ
lanes.
H_PROCHOT#_R
H_PROCHOT#
H_PM_DOW N_R
H_SKTOCC_N
PROC_SELECT#
CFG_RCOMP
CPU_VIDALERT_N
SKL_XDP_MBP_0
SKL_XDP_MBP_1
SKL_MBP_2
SKL_MBP_3
H_TDO
H_TCK
H_TRST#
H_PREQ#
H_PRDY#
CFG4
VCCST_PW RGD_CPU
H_PROCHOT#
H_TDO
H_TCK
H_PECI_R
VCCST_PW RGD
VCCST_PW RGD
H_SKTOCC_N
CFG2
1.0V_VCCST
1.0DX_VCCSTG
1.0V_VCCST
1.0V_VCCST
VDD3
3.3VA
H_PROCHOT#
65,73,75
PCH_PECI
37
PCH_CPU_BCLK_R_DN
40
PCH_CPU_BCLK_R_DP
40
PCH_CPU_PCIBCLK_R_DN
40
PCH_CPU_PCIBCLK_R_DP
40
CPU_24MHZ_R_DN
40
CPU_24MHZ_R_DP
40
H_PW RGD
38
PLTRST_CPU_N
37
H_PM_SYNC
37
H_PM_DOW N
37
PCH_THERMTRIP#
37
H_SKTOCC_N
39
H_CPU_SVIDCLK
73,75
H_CPU_SVIDDAT
73,75
H_CPU_SVIDALRT#
73,75
H_TRST#
43
H_PREQ#
43
H_PRDY#
43
H_PROCHOT_EC
44
H_PECI
44
ALL_SYS_PW RGD
13,43,44,73,75
DDR_VTT_PG_CTRL
61
1.0DX_VCCSTG
7,65,66
VDD3
30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72
VCCIO
2,3,7,64
1.0V_VCCST
7,37,38,64,73,75
3.3VA
35,36,37,38,39,41,43,63
Title
Size
Document Number
Rev
Date:
Sheet
of
6-71-P65S0-D02C
D02C
[05]Processor 4/7-CLK/JTAG/MISC
A3
5
91
W ednesday, September 07, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P650RS
Title
Size
Document Number
Rev
Date:
Sheet
of
6-71-P65S0-D02C
D02C
[05]Processor 4/7-CLK/JTAG/MISC
A3
5
91
W ednesday, September 07, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P650RS
Title
Size
Document Number
Rev
Date:
Sheet
of
6-71-P65S0-D02C
D02C
[05]Processor 4/7-CLK/JTAG/MISC
A3
5
91
W ednesday, September 07, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P650RS
R290
51_04
R678
51_04
C331
*0.01u_16V_X7R_04
R680
20_1%_04
R188
60.4_1%_04
R281
100_04
R683
*12.1_1%_04
R284
220_04
S
D
G
Q13A
MTDK3S6R
2
6
1
R674
49.9_1%_04
R140
100K_04
SKYLAKE_HALO
BGA1440
5 OF 14
REV = 1
?
?
U59E
SKL_H_CPU
PROC_SELECT#
BN1
CATERR#
BM30
SKTOCC#
BR33
PM_DOWN
BP31
PM_SYNC
BM34
RESET#
BP35
PROCPWRGD
BT31
VCCST_PWRGD
H13
CFG[17]
BN23
CFG[15]
BT19
CFG[16]
BP23
CFG[11]
BT22
CFG[12]
BM19
CFG[10]
BT23
CFG[9]
BR22
CLK24N
D31
CFG[1]
BN27
CFG[3]
BN28
CFG[18]
BN22
PROC_TDI
BL32
CFG[0]
BN25
CFG[2]
BN26
CFG[4]
BR20
CFG[6]
BT20
CFG[5]
BM20
CFG[7]
BP20
CFG[8]
BR23
CFG[13]
BR19
CFG[14]
BP19
CFG[19]
BP22
PROC_PREQ#
BL30
PROC_PRDY#
BP27
VIDSCK
BH32
PROC_TDO
BT28
CLK24P
E31
PCI_BCLKN
C36
PCI_BCLKP
D35
BCLKN
A32
VIDSOUT
BH29
PROCHOT#
BR30
DDR_VTT_CNTL
BT13
CFG_RCOMP
BT25
PROC_TRST#
BP30
PROC_TCK
BR28
PROC_TMS
BP28
VIDALERT#
BH31
THERMTRIP#
J31
PECI
BT34
BCLKP
B31
BPM#[0]
BR27
BPM#[1]
BT27
BPM#[2]
BM31
BPM#[3]
BT30
R679
499_1%_04
R135
1K_04
R677
1K_04
R684
1K_04
R681
100K_04
R143
0_04
R285
56.2_1%_04
R688
100K_04
S
D
G
Q13B
MTDK3S6R
5
3
4
Q23
2SK3018S3
G
D
S
R682
*0402_short
C973
47p_50V_NPO_04
C336
*0.1u_10V_X7R_04
Sheet 5 of 91
Processor 4/7
Summary of Contents for P650HS
Page 1: ...P650HS G P651HS G ...
Page 2: ......
Page 3: ...Preface I Preface Notebook Computer P650HS G P651HS G Service Manual ...
Page 14: ...Preface XII Preface ...
Page 26: ...Introduction 1 12 1 Introduction ...
Page 27: ...Introduction Mainboard Overview Bottom Connectors 1 13 1 Introduction ...
Page 28: ...Introduction 1 14 Mainboard Overview Bottom Connectors 1 Introduction ...
Page 49: ...Top A 3 A Part Lists Top Figure A 1 Top ...
Page 50: ...A 4 Bottom A Part Lists Bottom Figure A 2 Bottom ...
Page 51: ...Main Board A 5 A Part Lists Main Board Figure A 3 Main Board ...
Page 52: ...A 6 HDD A Part Lists HDD Figure A 4 HDD ...
Page 53: ...LCD A 7 A Part Lists LCD Figure A 5 LCD ...
Page 54: ...A 8 LCD Sharp A Part Lists LCD Sharp Figure A 6 LCD Sharp ...