CS5460A
42
DS284PP4
anteed ranges for accuracy of ±0.1% of reading
(with respect to a known voltage and current level)
will not be valid until a gain/offset calibration is
performed. Although the CS5460A will always ex-
hibit the lin variation tolerances that are
specified in Table 2, the exact reference voltage
and current levels to which this linearity is refer-
enced will vary from sample to sample. If no cali-
bration
is
performed,
these
voltage/current
reference levels exist based on the full-scale DC in-
put voltage limits for each channel, which are ap-
proximately equal to the voltages specified in the
“Max Input” row of Table 2. But these voltages
will have a variation from part to part. Any given
CS5460A sample must be calibrated to insure the
guaranteed accuracy = (livariation) abili-
ties of the sample, with respect to a specific input
voltage signal levels at the voltage/current channel
inputs. The exact calibration signals must be sup-
plied by the user during calibration., and therefore
the user determines the levels of these reference
signals are determined by the user.
As an example, suppose the user runs the DC gain
calibration sequence on the current channel (as-
sume PGA gain set for “10x”) using a calibration
signal level across the IIN+/IIN- pins of 187.5 mV
(DC).
After this calibration is performed, the
full-scale digital output code (0x7FFFFF in the In-
stantaneous Current Register) will be obtained
whenever the input voltage across the IIN+ and
IIN- pins is 187.5 mV (DC). Note that this level is
~75% of the (typical) maximum available input
voltage range [i.e, ~
±
250 mV DC.] In this situa-
tion, the current channel input ranges for which
±0.1% lin variation are guaranteed will be
reduced to between 0.5mV (DC) and 187.5mV
(DC), as opposed to what is specified in Table 2
[which would translate into a voltage range be-
tween 0.5mV (DC) and 250 mV (DC)].
Also note that using gain calibration signal levels
which cause the CS5460A to set the internal gain
registers to a value that is less than unity will effec-
tively decrease the guaranteed “±0.1% of reading”
lin variation range (and therefore the accu-
racy range) of the RMS calculation results and the
overall energy results. [Refer to Table 2.] This will
occur whenever a DC gain calibration is performed
(on either channel) of a CS5460A sample while ap-
plying a DC signal whose value is less than the in-
dividual sample’s inherent maximum differential
DC input voltage level. This will also occur when-
ever an AC gain calibration is performed (on either
channel) using an AC signal whose RMS value is
less then 60% of the sample’s inherent maximum
AC input voltage levels.
Finally, remember that the ±0.1% (of reading) ac-
curacy guarantee is made with the assumption that
the device has been calibrated with MCLK =
4.096 MHz, K = 1, and N = 4000. If MCLK/K be-
comes too small, or if N is set too low (or a combi-
nation of both), then the CS5460A may not exhibit
±0.1% lin variation.
4.8.10 Order of Calibration Sequences
Should offset calibrations be performed before gain
calibrations? Or vice-versa? This section summa-
rizes the recommended order of calibration.
1. If the user intends to measure any DC content
that may be present in the voltage/current and pow-
er/energy signals, then the DC offset calibration se-
quences should be run (for both channels) before
any other calibration sequences. However if the
user intends to remove the DC content present in
either the voltage or current signals (by turning on
the voltage channel HPF option and/or the current
channel HPF option--in the Status Register) then
DC offset calibration does not need to be executed
for that channel. Note that if either the voltage HPF
or current HPF options are turned on, then any DC
component that may be present in the power/ener-
gy signals will be removed from the CS5460A’s
power/energy results.
2. If the user intends to set the energy registration
accuracy to within ±0.1% (with respect to reference
Summary of Contents for CS5460A
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