DS89
5DB1
7
CDB4354
3. SCHEMATICS AND LAYOUT
CS4354
CS8416
S/PDIF
Receiver
Serial
Audio
Clocks &
Data
Analog
Outputs
Clocks &
Data
Selection
(Headers)
Serial
Audio
Clocks &
Data
Direct External
Input
Optical S/PDIF
Input
AOUTA
Filter
AOUTB
Filter
Coaxial S/PDIF
Input
Indicator LEDs
+5V power
+3.3V power
VL power
S/PDIF Error
Power:
+5V Input, +3.3V Regulator
CS4354
De-emphasis
Select
CS8416
Manual
Reset
Hardware Controls
VL Select:
5V or 3.3V
Figure 2. System Block Diagram and Signal Flow
