DS773DB1
21
CDB42L55
-120
-60
-115
-110
-105
-100
-95
-90
-85
-80
-75
-70
-65
d
B
r
A
-50
+0
-40
-30
-20
-10
dBr A
Figure 20. THD+N vs. Volume - Digital In to HP Out
Figure 21.
FFT - Digital In to HP Out @ 0 dBFS
Master Volume
(Digital)
Headphone Volume
(Analog)
-140
+0
-120
-100
-80
-60
-40
-20
d
B
r
A
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
-140
+0
-120
-100
-80
-60
-40
-20
d
B
r
A
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
Figure 22. FFT - Digital In to HP Out @ -60 dBFS
Figure 23. FFT - Digital In to HP Out - no input
-140
+0
-120
-100
-80
-60
-40
-20
d
B
r
A
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
-3
+3
-2
-1
+0
+1
+2
d
B
r
A
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
-40
+40
-30
-20
-10
+0
+10
+20
+30
d
B
r
A
-125
+0
-100
-75
-50
-25
dBFS
Figure 24. Freq. Response - Digital In to HP Out
Figure 25. Fade-to-Noise Linearity- Digital In to HP Out
Summary of Contents for CDB42L55
Page 25: ...DS773DB1 25 CDB42L55 8 CDB42L55 SCHEMATICS Figure 37 CS42L55 Analog I O Schematic Sheet 1 ...
Page 26: ...26 DS773DB1 CDB42L55 Figure 38 S PDIF Digital Interface Schematic Sheet 2 ...
Page 27: ...DS773DB1 27 CDB42L55 Figure 39 PLL oscillator and external I O connections Schematic Sheet 3 ...
Page 28: ...28 DS773DB1 CDB42L55 Figure 40 Microcontroller and FPGA Schematic Sheet 4 ...
Page 29: ...DS773DB1 29 CDB42L55 Figure 41 Power Schematic Sheet 5 ...
Page 30: ...30 DS773DB1 CDB42L55 9 CDB42L55 LAYOUT Figure 42 Silk Screen ...
Page 31: ...DS773DB1 31 CDB42L55 Figure 43 Top Side Layer ...
Page 32: ...32 DS773DB1 CDB42L55 Figure 44 GND Layer 2 ...
Page 33: ...DS773DB1 33 CDB42L55 Figure 45 Power Layer 3 ...
Page 34: ...34 DS773DB1 CDB42L55 Figure 46 Bottom Side Layer ...
Page 35: ...DS773DB1 35 CDB42L55 10 REVISION HISTORY Revision Changes DB1 Initial Release ...
