EES3 Hardware Interface Description
6.2 Mounting EES3 onto the Application Platform
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6.2
Mounting EES3 onto the Application Platform
This section describes how to mount EES3 onto the PCBs (=printed circuit boards), including
land pattern and stencil design, board-level characterization, soldering conditions, durability
and mechanical handling. For more information on issues related to SMT module integration
see also
Note: All SMT module pads need to be soldered to the application’s PCB. Not only must all sup-
ply pads and signals be connected appropriately, but all pads denoted as “Do not use“ will also
have to be soldered (but not electrically connected) in order to ensure the best possible me-
chanical stability.
6.2.1
SMT PCB Assembly
6.2.1.1
Land Pattern and Stencil
The land pattern and stencil design as shown in
characterizations for lead-free solder paste on a four-layer test PCB and a 120 micron-thick
stencil.
Taking the copper pad area as base, maximum possible overprinting is 85% of this area. How-
ever, Cinterion tests have shown that for most pads an overprinting of 40% is well suited, i.e.,
1.3mm x 1.3mm. An exception is the RF pad: Because of the smaller distance to the adjacent
ground pads, there should be no overprinting to optimize RF performance.
shows the
recommended stencil design.
Figure 45:
Land pattern (bottom view)
