— 9 —
Block diagram of DSP and DAC circuit
DSP
LSI105
HG51B155FD
Effect RAM (64K-bit)
LSI107
SRM2264LC90,10
Sound Source ROM
LSI103
TC5316200CP-C106
CE
A0 ~ A19
D0 ~ D15
RA0 ~
RA19
RD0 ~
RD15
RA22
D0 ~ D7
A0 ~ A3
A13
A14
RD
WR
RESET
SOLP
BOK
WOK1
EA0 ~
EA12
ED0 ~
ED15
CS
WE
OE
D0 ~ D15
A0 ~ A12
ECEB EOEB EWEB
PG
X102
16.384MHz
DAC
LSI101
UPD6376CX
LOUT
ROUT
SOLP: Sound data
BOK: Bit clock
WOK1: Word clock
SI
CLK
LRCK
APO
CCSB
CRDB
CWRB
Pin No.
Terminal
In/Out
Function
96
EWEB
Out
Write enable signal output for the effect RAM
98
EA13
Out
Not used
106
EOEB
Out
Read enable signal output for the effect RAM
108
VCC7
In
+5 V source
111
ECEB
Out
Chip select signal output for the effect RAM
113 ~ 117
Not used
118
VCC4
In
+5 V source
119
GND4
In
Ground (0 V) source
120 ~ 122
Not sued
123 ~ 130
ED0 ~ ED7 In/Out
Data bus for the effect RAM
131
GND5
In
Ground (0 V) source
132 ~ 134
Not used. Connected to ground.
135, 136
Not used
Summary of Contents for Oriental Maestro AT1
Page 1: ...ELECTRIONIC KEYBOARD AT 1 without price...
Page 17: ...15 SCHEMATIC DIAGRAMS PCB JCM719 MA1M 8 9 10 11 2 21 12 13 14 15 20 1 4 3 5 6 7 22 23...
Page 18: ...16 PCBs JCM719 CN1M CN2M MA2M 19 16 17 18...
Page 19: ...17 PCBs JCM617T KY1M KY2M...
Page 28: ...8 11 10 Nishi Shinjuku Shinjuku ku Tokyo 160 Japan Telephone 03 3347 4926 May 1995...
