FMC-4SFP+ - User’s Manual
17
2.
Clock Generation
The CAEN ELS FMC-SFP mounts also a Clock Generator Chip Silicon
Labs
SI570
(570BBC000121DG), which allows to generate random low-jitter clock at any
frequency ranging from 10 MHz to 280 MHz.
At power-up of the board, the SI570 chip generates a frequency according to the
configuration of DIP Switches. In the following table are summarized the possible start-
up DIP switches configurations:
Switch #3
Switch #2
Switch #1
Clock Frequency
0
0
0
125.00 MHz
0
0
1
156.25 MHz
0
1
0
162.50 MHz
0
1
1
178.25 MHz
1
0
0
200.00 MHz
1
0
1
203.15 MHz
1
1
0
250.00 MHz
1
1
1
Do not use
Table 8:
Start-up Clock Frequency
The Silicon Labs clock generation chip is accessible also using the I2C bus, so
it is possible to communicate directly with the chip to configure it and to generate the
desired clock frequency. The I2C interface is accessible using the pins: LA25_P (Si570
I2C SCL) and LA25_N (Si570 I2C SDA). For additional information regarding the
Si570 please refer to its datasheet.
The DIP Switch #4 determinates the mode of operation. When it is set to 1, all
pins have to be controlled by the Carrier Board. If there is not an interaction with the
board, then the FMC-SFP will not generate a clock. Otherwise, when this switch is set
to 1, the module is enabled and the communication with the Carrier Board is disabled.
