OPA277, OPA2277, OPA4277
2
SBOS079A
www.ti.com
OFFSET
OFFSET
VOLTAGE
VOLTAGE DRIFT
PRODUCT
max,
µ
V
max,
µ
V/
°
C
PACKAGE-LEAD
Single
OPA277PA
±
50
±
1
DIP-8
OPA277P
±
20
±
0.15
DIP-8
OPA277UA
±
50
±
1
SO-8 Surface Mount
OPA277U
±
20
±
0.15
SO-8 Surface Mount
OPA277AIDRM
±
100
±
1
DFN-8 (4mm x 4mm)
Dual
OPA2277PA
±
50
±
1
DIP-8
OPA2277P
±
25
±
0.25
DIP-8
OPA2277UA
±
50
±
1
SO-8 Surface Mount
OPA2277U
±
25
±
0.25
SO-8 Surface Mount
OPA2277AIDRM
±
100
±
1
DFN-8 (4mm x 4mm)
Quad
OPA4277PA
±
50
±
1
DIP-14
OPA4277UA
±
50
±
1
SO-14 Surface Mount
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet or visit the TI web site
at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage .................................................................................... 36V
Input Voltage ..................................................... (V–) –0.7V to (V+) +0.7V
Output Short-Circuit
(2)
.............................................................. Continuous
Operating Temperature .................................................. –55
°
C to +125
°
C
Storage Temperature ..................................................... –55
°
C to +125
°
C
Junction Temperature ...................................................................... 150
°
C
Lead Temperature (soldering, 10s) ................................................. 300
°
C
ESD Rating (Human Body Model) .................................................. 2000V
(Machine Model) ........................................................... 100V
NOTE: (1) Stresses above these rating may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short-circuit to ground, one amplifier per package.
PACKAGE/ORDERING INFORMATION
(1)
PIN DESCRIPTIONS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
–In D
+In D
V–
+In C
–In C
Out C
Out A
–In A
+In A
V+
+In B
–In B
Out B
OPA4277
14-Pin DIP, SO-14
A
D
B
C
1
2
3
4
8
7
6
5
V+
Out B
–In B
+In B
Out A
–In A
+In A
V–
OPA2277
8-Pin DIP, SO-8
A
B
1
2
3
4
8
7
6
5
Offset Trim
V+
Output
NC
(1)
Offset Trim
–In
+In
V–
OPA277
8-Pin DIP, SO-8
1
2
3
4
Out A
−
In A
+In A
V
−
8
7
6
5
Out B
Pin 1
Indicator
OPA2277AIDRM
DFN-8 4mm x 4mm
(top view)
V+
−
In B
Thermal Pad
on Bottom
(Connect to V
−
)
+In B
1
2
3
4
Offset Trim
−
In
+In
V
−
8
7
6
5
Offset Trim
Pin 1
Indicator
OPA277AIDRM
DFN-8 4mm x 4mm
(top view)
V+
Output
Thermal Pad
on Bottom
(Connect to V
−
)
NC
NOTE: (1) NC = No connection.
