Broadcast Warehouse TX 150/300, Technical Manual, Page: 27 / 41

TX FM Transmitter technical manual
page 27
Technical data
allel with R4(R33) . This has the effect of a more “commercial loud sound” when in loud mode compared to a
more true to the original sound when in clarity mode due to less clipping taking place. VR3(VR4) is connected
across the inputs of the transconductance amplifier and provide offset adjustment to null any distortions intro-
duced by offsets inherent in the op-amps
Stereo encoder description
The stereo encoder section is based around a high speed switch which is used to generate the multiplex at
38KHz. The switch is controlled by microcontroller IC13 which supplies the timing signals to the switch at 304KHz.
The high speed enables an over-sampled 38KHz subcarrier to be generated that is rock steady and spectrally
clean. As the signal is generated digitally no adjustments or setups are required for the encoder. The only adjust-
ments on the encoder section are the stereo/mono control and the level of the stereo subcarrier. The 19KHz pilot
tone is also generated by the microcontroller and because of this the stereo separation is excellent due to the per-
fect timing between the pilot and the subcarrier. The 19KHz pilot is also generated by over-sampling techniques to
produce a very low distortion pilot tone.
The audio path through the encoder starts at 15KHz brickwall filter FIL1(FIL2). These provide over 40 db of pro-
tection by 17 KHz, 50 dB by 20 KHz as well as a notch at 19KHz to protect the pilot signal even further. the out-
put from the filters are buffered by op-amp IC10(IC11). These buffer op-amps can also be used as clippers, which
can be used to remove any overshoots introduced by ringing in the 15KHz filters. The buffer op-amps drive into
the analogue switches. The switches are controlled by the microcontroller IC17 and the output from the switches
feed into three resistors R100,101,102 to provide a d/a type function producing the multiplex signal. The resistors
are carefully chosen to provide sine weighting for the reconstruction, which keeps the lower order harmonic con-
tent down to almost zero. These three resistors are combined in virtual earth mixer op-amp IC14. The stereo pilot
tone emerges from the microcontroller as a 4 bit word which has sine weighting applied to it by resistors R93 to
R98. At this point, apart from 19KHz, the pilot has no significant energy below 304 KHz . The pilot is fed through
VR4 for adjustment of the pilot level before being combined with the sucarrier at the virtual earth mixer op-amp
IC14. The complete stereo multiplex signal emerges from IC14 and is fed into a low-pass filter formed by L1,L2
and C78 to C84. This filter removes any high frequency products due to the sample rate. The filter is buffered by
output op-amp IC15 which also provides a fixed output level of +6dbu, which is fed to the multiplex output BNC
socket on the back panel, as well as to one side of the loopthrough jumper J1.
Exciter description
The frequency determining elements are inductor L3 and varicap diode VD1 together with capacitors C20 - C23.
These components, together with transistors T4 and T5, form a cascode oscillator whose output is then buffered
by RF transistor T6. The RF output from T6 is impedance matched to the base of P.A. transistor T7 by RFT1, a 4
to 1 matching transformer. The one watt power output from P.A. transistor T7 is impedance matched by coils L4
and L5 and associated capacitors C30-34 to the 50 ohm output socket CON7. These components also provide
harmonic filtering. A coaxial cable carries the RF output from this socket to the RF input connector on the main
power amplifier PCB.
The PLL circuit is primarily IC18 which is a serially programmable PLL chip. The microcontroller IC17 reads the
dial switches at power up and outputs a serial code to the PLL chip in a format that determines the output fre-
quency that the PLL will lock the transmitter to. If the microcontroller IC17 detects that the switches are set to
4440 then the microcontroller IC17 will talk to the microcontroller on the control / LCD board to request the LCD
display control system stored frequency. The PLL chip delivers raw control pulses to the loop filter built around
op-amp IC20. The loop filter is a low-pass filter that takes the raw rectangular differential outputs from the PLL
chip and creates a DC voltage to apply to the frequency determining component, varicap diode VD1. The main
time constant in the loop filter is formed by resistor R7 driving C7 and R5 driving C5. The high resistance of R5
and R7 allows slow charging of C5 and C7 from the PLL chip. The DC voltage derived from the output of the op-
amp will be slow to change in response to the raw PLL pulses due to the slow charging of those capacitors. This
slow DC voltage change is converted to slow frequency change by the varicap diode. IC19 is an analogue switch
that shorts out the two high resistance resistors in the loop filter to allow faster charging of C5 and C7, and so, a
faster change of the output DC voltage from the filter. This faster changing voltage can allow the transmitter to get
on frequency faster. When the transmitter is on frequency the analogue switch stops shorting out the high resist-
ance resistors and the slow loop takes control, which greatly improves the audio response of the transmitter. The
microcontroller IC17 determines when to switch the analog switch in and out by reading the lock detect signals
from the PLL chip. The microcontroller can also use this information to switch off transistor T6 with open collector
configured T11 which mutes the RF output when the transmitter is out of lock. LED5 provides visual indication of