________________________________________________________________________________________________________________________________________________
—
NEON load/store and permute pipeline The SoC
following additional components:
—
Boot ROM, including HAB (96 KB)
—
Internal multimedia / shared, fast access RAM (OCRAM, 128 KB)
•
External memory interfaces:
—
16-bit, and 32-bit DDR3
—
16/32-bit NOR Flash.
—
16/32-bit PSRAM, Cellular RAM (32 bits or less)
Each i.MX 6 SoloLite processor enables the following interfaces to external devices (some of them are muxed
and not available simultaneously):
•
Displays—Total three interfaces are available.
—
LCD, 24bit display port, up to 225 Mpixels/sec (for example, WUXGA at 60 Hz)
—
EPDC, color, and monochrome E
Camera sensors:
—
Parallel Camera port (up to 16
—
Four MMC/SD/SDIO card ports all supporting:
—
1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS
mode (104 MB/s max)
—
1-bit, 4-bit, or 8-
SDR and DDR modes (104 MB/s max)
•
USB:
—
Two High Speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB Phy
—
One USB 2.0 (480 Mbps) hosts:
—
One HS hosts with integrated HS
•
Miscellaneous IPs and interfaces:
—
SSI block—capable of supporting audio sample frequencies up to 192 kHz stereo inputs
and outputs with I2 S mode
—
Five UARTs, up to 5.0 Mbps each:
–
Providing RS232 interface
–
Supporting 9
–
One of t
wire.This is due to the SoC IOMUX limitation, since all UART IPs are identical.
–
Four eCSPI (Enhanced CSPI)
–
Three I2C, supporting 400 kbps
–
Ethernet Controller, 10/100 Mbps
–
Four Pulse Widt
–
System JTAG Controller (SJC)
–
GPIO with interrupt capabilities
–
8x8 Key Pad Port (KPP)
–
Sony Philips Digital Interface (SPDIF), Rx and Tx
–
Two Watchdog timers (WDOG)
–
Audio MUX (AUDMUX)
The i.MX 6 SoloLite processor integrates advance
•
Provide PMU, including LDO supplies, for on
•
Use Temperature Sensor for monitoring the die temperature
•
Support DVFS techniques for low power modes
•
Use Software State Retention and Power Gating for ARM and MPE
•
Support various levels of system power modes
•
Use flexible clock gating control scheme
The i.MX 6 SoloLite processor uses dedicated HW accelerators to meet the targeted multimedia performance
The use of HW accelerators is a key factor in obtaining high performance at low power consumption numbers,
while having the CPU core relatively free for performing other tasks.
Beta Touch Computer
____________________________________________________________________________________________________________________________________________
/store and permute pipeline The SoC-level memory system consists of the
following additional components:
Boot ROM, including HAB (96 KB)
Internal multimedia / shared, fast access RAM (OCRAM, 128 KB)
External memory interfaces:
bit DDR3-800, and LPDDR2-800 channels
bit NOR Flash.
bit PSRAM, Cellular RAM (32 bits or less)
SoloLite processor enables the following interfaces to external devices (some of them are muxed
tal three interfaces are available.
LCD, 24bit display port, up to 225 Mpixels/sec (for example, WUXGA at 60 Hz)
EPDC, color, and monochrome E-INK, up to 1650x2332 resolution and 5-bit grayscale •
Camera sensors:
Parallel Camera port (up to 16-bit and up to 66 MHz peak) • Expansion cards:
Four MMC/SD/SDIO card ports all supporting:
bit transfer mode specifications for SD and SDIO cards up to UHS
mode (104 MB/s max)
-bit transfer mode specifications for MMC cards up to 52 MHz in both
SDR and DDR modes (104 MB/s max)
Two High Speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB Phy
One USB 2.0 (480 Mbps) hosts:
One HS hosts with integrated HS-IC USB (High Speed Inter-Chip USB) Phy
Miscellaneous IPs and interfaces:
capable of supporting audio sample frequencies up to 192 kHz stereo inputs
and outputs with I2 S mode
Five UARTs, up to 5.0 Mbps each:
Providing RS232 interface
Supporting 9-bit RS485 multidrop mode
One of the five UARTs (UART1) supports 8-wire while others four supports 4
This is due to the SoC IOMUX limitation, since all UART IPs are identical.
Four eCSPI (Enhanced CSPI)
Three I2C, supporting 400 kbps
Ethernet Controller, 10/100 Mbps
Four Pulse Width Modulators (PWM)
System JTAG Controller (SJC)
GPIO with interrupt capabilities
8x8 Key Pad Port (KPP)
Sony Philips Digital Interface (SPDIF), Rx and Tx
Two Watchdog timers (WDOG)
Audio MUX (AUDMUX)
SoloLite processor integrates advanced power management unit and controllers:
Provide PMU, including LDO supplies, for on-chip resources
Use Temperature Sensor for monitoring the die temperature
Support DVFS techniques for low power modes
Use Software State Retention and Power Gating for ARM and MPE
Support various levels of system power modes
Use flexible clock gating control scheme
SoloLite processor uses dedicated HW accelerators to meet the targeted multimedia performance
The use of HW accelerators is a key factor in obtaining high performance at low power consumption numbers,
while having the CPU core relatively free for performing other tasks.
Beta Touch Computer
_____________________________________
Page | 14
level memory system consists of the
SoloLite processor enables the following interfaces to external devices (some of them are muxed
LCD, 24bit display port, up to 225 Mpixels/sec (for example, WUXGA at 60 Hz)
bit grayscale •
p to 66 MHz peak) • Expansion cards:
bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR-104
up to 52 MHz in both
Two High Speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB Phy
Chip USB) Phy
capable of supporting audio sample frequencies up to 192 kHz stereo inputs
le others four supports 4-
This is due to the SoC IOMUX limitation, since all UART IPs are identical.
SoloLite processor uses dedicated HW accelerators to meet the targeted multimedia performance.
The use of HW accelerators is a key factor in obtaining high performance at low power consumption numbers,
