Blaupunkt DVP 01, Service Manual

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Port Name Pin NO. Type Port Description
Parallel DVD/CD or Serial CD Interface
AREQUEST P194 O Audio request. Decoder asserts AREQUEST to indicate
that the audio input buffer has available space.
ADACK P198 I Audio data acknowledge.
DVD-DATA P186-189 I DVD parallel compressed data from DVD DSP. When
(7:4) DVD DSP sends 32-bit words. It must write the MSB first
DVD-DATA3/ P185 I Asserted HIGH indicates a corrupted byte. Decoder
CD-C2P0 keeps The previous valid picture on-screen until the next
valid Picture is decoded. This pin is shared with DVD
Compressed data DVD-DATA3.
DVD-DATA2/ P184 I CD bit clock. Decoder accept multiple BCK rates. This pin
CD-BCK Is shared with DVD compressed data DVD-DATA2.
DVD-DATA1/ P182 I Programmable polarity 16-bit word synchronization to the
CD-LRCK Decoder (right channel HIGH). This pin is shared with
DVD compressed data DVD-DATA1)
DVD-DATA0/ P180 I Serial CD data. This pin is shared with DVD compressed
CD-DATA Data DVD-DATA0
ERROR P200 I Error in input data. If ERROR signal is not available from
The DSP it must be grounded through a 4.7K resistor.
VDACK P196 I Video data acknowledge. Asserted when DVD data is
valid. Polarity is programmable.
VREQUEST P191 O Video request. Decoder asserts REQUEST to indicate
that The video input buffer has available space. Polarity
is Programmable
VSTROBE P192 I Video strobe. Programmable dual mode pulse.
Asynchronous and synchronous. In Asynchronous mode,
an external source pulses VSTROBE to indicate data is
ready for transfer. In synchronous mode VSTROBE
clocks data.
Video Output
HSYNC P157 I/O Horizontal sync. The decoder begins outputting pixel
data for a new horizontal line after the falling (active)
edge of HSYNC.
VCLK P177 I Video clock. Clocks out data on input. VDATA(7:0).
Clock is typically 27 MHz.
VDATA(7:0) P142.143.145.148 O Video data bus. Byte serial CbYCrY data synchronous
150.152.154.155 With VCLK. At power-up, the decoder initially drives
VDATA. Any other device attached to the video bus must
be 3-stated when the decoder is powered-up. During
Boot-up, the decoder initializes to 3-state VDATA: but
For a brief period it drives VDATA.
VSYNC P158 I/O Vertical sync. Bi-directional, the decoder outputs the top
Border of a new field on the first HSYNC after the
falling Edge of VSYNC. VSYNC can accept vertical
synchronization or top/bottom field notification from an
external source. (VSYNC HIGH = bottom field. VSYNC
LOW = Top field)
IC Block Diagramm
IC Block diagram